Photoluminescence investigation of charge build-up process in the emitter of a double-barrier resonant tunneling structure

Charge build-up process in the emitter of a double-barrier resonant tunneling structure is studied by using photoluminescence spectroscopy. Clear evidence is obtained that the charge accumulation in the emitter keeps almost constant with bias voltages in the resonant regime, while it increases remarkably with bias voltages beyond resonant regime. The optical results are in good agreement with the electrical measurement. It is demonstrated that the band gap renormalization plays a certain rob in the experiment.

TUNNELING ESCAPE TIME OF ELECTRONS THROUGH DOUBLE-BARRIER RESONANT-TUNNELING STRUCTURES

Tunneling escape of electrons from quantum wells (QWs) has systematically been studied in an arbitrarily multilayered heterostructures, both theoretically and experimentally. A wave packet method is developed to calculate the bias dependence of tunneling escape time (TET) in a three-barrier, two-well structure. Moreover, by considering the time variation of the band-edge profile in the escape transient, arising from the decay of injected electrons in QWs, we demonstrate that the actual escape time of certain amount of charge from QWs, instead of single electron, could be much longer than that for a single electron, say, by two orders of magnitude at resonance. The broadening of resonance may also be expected from the same mechanism before invoking various inhomogeneous and homogeneous broadening. To perform a close comparison between theory and experiment, we have developed a new method to measure TET by monitoring transient current response (TCR), stemming from tunneling escape of electrons out of QWs in a similar heterostructure. The time resolution achieved by this new method reaches to several tens ns, nearly three orders of magnitude faster than that by previous transient-capacitance spectroscopy (TCS). The measured TET shows an U-shaped, nonmonotonic dependence on bias, unambiguously indicating resonant tunneling escape of electrons from an emitter well through the DBRTS in the down-stream direction. The minimum value of TET obtained at resonance is accordance with charging effect and its time variation of injected electrons. A close comparison with the theory has been made to imply that the dynamic build-up of electrons in DBRTS might play an important role for a greatly suppressed tunneling escape rate in the vicinity of resonance.

Contrastive study of two SESAMs for passive mode-locking in Nd:YVC>4 laser with low pump power

Two semiconductor saturable absorber mirrors (SESAMs), of which one is coated with 50% reflection film on the top and the other is not, were contrastively studied in passively mode-locked solid-state lasers which were pumped by low output power laser diode (LD). Experiments have shown that reducing the modulation depth of SESAM by coating partial reflection film, whose reflectivity is higher than that between SESAM and air interface, is an effective method to get continuous wave (CW) mode-locking instead of Q-switched mode-locking (QML) in low power pumped solid-state lasers. A simple Nd:YVO4 laser pumped by low power LD, in which no water-cooling system was used, could obtain CW mode-locking by the 50% reflector coated SESAM with average output power of ~ 20 mW

A novel polarization-insensitive semiconductor optical amplifier structure with large 3dB bandwidth

A novel approach to achieving a polarization-insensitive semiconductor optical amplifier is presented. The active layer consists of graded tensile strained bulk-like structure. which can not only enhance TM mode material gain and further realize polarization-insensitivity, but also get a large 3dB bandwidth due to different strain introduced into the active layer. 3dB bandwidth more than 40nm. 65nm has been obtained in die experiment and theory, respectively. The characteristics of such polarization insensitive structure have been analyzed, The influence of the amount of strain and of the thickness of strain layer on the polarization insensitivity has been discussed.

Twin and grain boundary in InP: A synchrotron radiation study

Experimentally observed X-ray reflectivity curves show bi-crystal(twin) characteristics. The study revealed that there was defect segregation at the twin boundary. Stress was relaxed at the edge of the boundary. Relaxation of the stress resulted in formation of twin and other defects. As a result of formation of such defects, a defect-free and stress-free zone or low defect density and small stress zone is created around the defects. So a twin model was proposed to explain the experimental results. Stress(mainly thermal stress), chemical stoichiometry deviation and impurities nonhomogeneous distributions are the key factors that cause twins in LEC InP crystal growth. Twins on (111) face in LEC InP crystal were studied. Experimental evidence of above mentioned twin model and suggestions on how to get twin-free LEC InP single crystals will be discussed.

Growth of Fe doped semi-insulating InP by LP-MOCVD

The semi-insulating InP has been grown using ferrocene as a dopant source by low pressure MOCVD. Fe doped semiinsulating InP material whose resistivity is equal to 2.0x10(8)Omega*cm and the breakdown field is Beater than 4.0x10(4)Vcm(-1) has been achieved. It is found that the magnitude of resistivity increases with growing pressure enhancement under keeping TMIn, PH3, ferrocene (Fe(C5H5)(2)) flow constant at 620 degrees C growth temperature. Moreover, the experimental results which resistivity varies with ferrocene mole fraction are given. It is estimated that active Fe doping efficiency; eta, is equal to 8.7x10(-4) at 20mbar growth pressure and 620 degrees C growth temperature by the comparison of calculated and experimental results.

Nano-layer structure of silicon-on-insulator materials

Silicon-on-insulator (SOI) has been recognized as a promising semiconductor starting material for ICs where high speed and low power consumption are desirable, in addition to its unique applications in radiation-hardened circuits. In the present paper, three novel SOI nano-layer structures have been demonstrated. ULTRA-THIN SOI has been fabricated by separation by implantation of oxygen (SIMOX) technique at low oxygen ion energy of 45 keV and implantation dosage of 1.81017/cm2. The formed SOI layer is uniform with thickness of only 60 nm. This layer is of crystalline quality. and the interface between this layer and the buried oxide layer is very sharp, PATTERNED SOI nanostructure is illustrated by source and drain on insulator (DSOI) MOSFETs. The DSOI structure has been formed by selective oxygen ion implantation in SIMOX process. With the patterned SOI technology, the floating-body effect and self-heating effect, which occur in the conventional SOI devices, are significantly suppressed. In order to improve the total-dose irradiation hardness of SOI devices, SILICON ON INSULATING MULTILAYERS (SOIM) nano-structure is proposed. The buried insulating multilayers, which are composed of SiOx and SiNy layers, have been realized by implantation of nitride and oxygen ions into silicon in turn at different ion energies, followed by two steps of high temperature annealing process, respectively, Electric property investigation shows that the hardness to the total-dose irradiation of SOIM is remarkably superior to those of the conventional SIMOX SOI and the Bond-and-Etch-Back SOI.

missing data imputation: a fuzzy k-means clustering algorithm over sliding window

Tianjin University of Technology