Flux line lattice structure and behavior in antiphase boundary free vicinal YBa2Cu3O7-delta thin films

Field angle dependent critical current, magneto-optical microscopy and high resolution electron microscopy studies have been performed on YBa2Cu3O7-delta thin films grown on miscut substrates. High resolution electron microscopy images show that the films studied exhibited clean epitaxial growth with a low density of antiphase boundaries and stacking faults. Any antiphase boundaries (APBs) formed near the film substrate interface rapidly healed rather than extending through the thickness of the film. Unlike vicinal films grown on annealed substrates, which contain a high density of antiphase boundaries, magneto-optical imaging showed no filamentary flux penetration in the films studied. The flux penetration is, however, asymmetric. This is associated with intrinsic pinning of flux strings by the tilted a-b planes and the dependence of the pinning force on the angle between the local field and the a-b planes. Field angle dependent critical current measurements exhibited the striking vortex channeling effect previously reported in vicinal films. By combining the results of three complementary characterization techniques it is shown that extended APB free films exhibit markedly different critical current behavior compared to APB rich films. This is attributed to the role of APB sites as strong pinning centers for Josephson string vortices between the a-b planes. (C) 2003 American Institute of Physics.

Ultralow surface recombination velocity in InP nanowires probed by terahertz spectroscopy.

Using transient terahertz photoconductivity measurements, we have made noncontact, room temperature measurements of the ultrafast charge carrier dynamics in InP nanowires. InP nanowires exhibited a very long photoconductivity lifetime of over 1 ns, and carrier lifetimes were remarkably insensitive to surface states despite the large nanowire surface area-to-volume ratio. An exceptionally low surface recombination velocity (170 cm/s) was recorded at room temperature. These results suggest that InP nanowires are prime candidates for optoelectronic devices, particularly photovoltaic devices, without the need for surface passivation. We found that the carrier mobility is not limited by nanowire diameter but is strongly limited by the presence of planar crystallographic defects such as stacking faults in these predominantly wurtzite nanowires. These findings show the great potential of very narrow InP nanowires for electronic devices but indicate that improvements in the crystallographic uniformity of InP nanowires will be critical for future nanowire device engineering.

Precursor flow rate manipulation for the controlled fabrication of twin-free GaAs nanowires on silicon substrates

Vertically oriented GaAs nanowires (NWs) are grown on Si(111) substrates using metal-organic chemical vapor deposition. Controlled epitaxial growth along the 111 direction is demonstrated following the deposition of thin GaAs buffer layers and the elimination of structural defects, such as twin defects and stacking faults, is found for high growth rates. By systematically manipulating the AsH 3 (group-V) and TMGa (group-III) precursor flow rates, it is found that the TMGa flow rate has the most significant effect on the nanowire quality. After capping the minimal tapering and twin-free GaAs NWs with an AlGaAs shell, long exciton lifetimes (over 700ps) are obtained for high TMGa flow rate samples. It is observed that the Ga adatom concentration significantly affects the growth of GaAs NWs, with a high concentration and rapid growth leading to desirable characteristics for optoelectronic nanowire device applications including improved morphology, crystal structure and optical performance. © 2012 IOP Publishing Ltd.

Phase perfection in zinc Blende and Wurtzite III-V nanowires using basic growth parameters.

Controlling the crystallographic phase purity of III-V nanowires is notoriously difficult, yet this is essential for future nanowire devices. Reported methods for controlling nanowire phase require dopant addition, or a restricted choice of nanowire diameter, and only rarely yield a pure phase. Here we demonstrate that phase-perfect nanowires, of arbitrary diameter, can be achieved simply by tailoring basic growth parameters: temperature and V/III ratio. Phase purity is achieved without sacrificing important specifications of diameter and dopant levels. Pure zinc blende nanowires, free of twin defects, were achieved using a low growth temperature coupled with a high V/III ratio. Conversely, a high growth temperature coupled with a low V/III ratio produced pure wurtzite nanowires free of stacking faults. We present a comprehensive nucleation model to explain the formation of these markedly different crystal phases under these growth conditions. Critical to achieving phase purity are changes in surface energy of the nanowire side facets, which in turn are controlled by the basic growth parameters of temperature and V/III ratio. This ability to tune crystal structure between twin-free zinc blende and stacking-fault-free wurtzite not only will enhance the performance of nanowire devices but also opens new possibilities for engineering nanowire devices, without restrictions on nanowire diameters or doping.

Improvement of morphology, structure, and optical properties of GaAs nanowires grown on Si substrates

We investigate vertical and defect-free growth of GaAs nanowires on Si (111) substrates via a vapor-liquid-solid (VLS) growth mechanism with Au catalysts by metal-organic chemical vapor deposition (MOCVD). By using annealed thin GaAs buffer layers on the surface of Si substrates, most nanowires are grown on the substrates straight, following (111) direction; by using two temperature growth, the nanowires were grown free from structural defects, such as twin defects and stacking faults. Systematic experiments about buffer layers indicate that V/III ratio of precursor and growth temperature can affect the morphology and quality of the buffer layers. Especially, heterostructural buffer layers grown with different V/III ratios and temperatures and in-situ post-annealing step are very helpful to grow well arranged, vertical GaAs nanowires on Si substrates. The initial nanowires having some structural defects can be defect-free by two-temperature growth mode with improved optical property, which shows us positive possibility for optoelectronic device application. ©2010 IEEE.

III-V nanowires for optoelectronics

The optical and structural properties of binary and ternary III-V nanowires including GaAs, InP, In(Ga)As, Al(Ga)As, and GaAs(Sb) nanowires by metal-organic chemical vapour deposition are investigated, Au colloidal nanoparticles are employed to catalyze nanowire growth. Zinc blende or wurtzite crystal structures with some stacking faults are observed for these nanowires by high resolution transmission electron microscope. In addition, the properties of heterostructure nanowires including GaAs-AlGaAs core-shell nanowires, GaAs-InAs nanowires, and GaAs-GaSb nanowires are reported. Single nanowire luminescence properties from optically bright InP nanowires are reported. Interesting phenomena such as two-temperature procedure, nanowire height enhancement of isolated ternary InGaAs nanowires, kinking effect of InAs-GaAs heterostructure nanowires, and unusual growth property of GaAs-GaSb heterostructure nanowires are investigated. These nanowires will play an essential role in future optoelectronic devices.

Direct observation of charge-carrier heating at WZ-ZB InP nanowire heterojunctions.

We have investigated the dynamics of hot charge carriers in InP nanowire ensembles containing a range of densities of zinc-blende inclusions along the otherwise wurtzite nanowires. From time-dependent photoluminescence spectra, we extract the temperature of the charge carriers as a function of time after nonresonant excitation. We find that charge-carrier temperature initially decreases rapidly with time in accordance with efficient heat transfer to lattice vibrations. However, cooling rates are subsequently slowed and are significantly lower for nanowires containing a higher density of stacking faults. We conclude that the transfer of charges across the type II interface is followed by release of additional energy to the lattice, which raises the phonon bath temperature above equilibrium and impedes the carrier cooling occurring through interaction with such phonons. These results demonstrate that type II heterointerfaces in semiconductor nanowires can sustain a hot charge-carrier distribution over an extended time period. In photovoltaic applications, such heterointerfaces may hence both reduce recombination rates and limit energy losses by allowing hot-carrier harvesting.

Tailoring the local interaction between graphene layers in graphite at the atomic scale and above using scanning tunneling microscopy.

With recent developments in carbon-based electronics, it is imperative to understand the interplay between the morphology and electronic structure in graphene and graphite. We demonstrate controlled and repeatable vertical displacement of the top graphene layer from the substrate mediated by the scanning tunneling microscopy (STM) tip-sample interaction, manifested at the atomic level as well as over superlattices spanning several tens of nanometers. Besides the full-displacement, we observed the first half-displacement of the surface graphene layer, confirming that a reduced coupling rather than a change in lateral layer stacking is responsible for the triangular/honeycomb atomic lattice transition phenomenon, clearing the controversy surrounding it. Furthermore, an atomic scale mechanical stress at a grain boundary in graphite, resulting in the localization of states near the Fermi energy, is revealed through voltage-dependent imaging. A method of producing graphene nanoribbons based on the manipulation capabilities of the STM is also implemented.

Identification of support conditions of buried pipes using a vibrating pig

This paper describes a method for monitoring the variation in support condition of pipelines using a vibration technique. The method is useful for detecting poor support of buried pipelines and for detecting spanning and depth of cover in sub-sea lines. Variation in the pipe support condition leads to increased likelihood of pipe damage. Under roadways, poorly supported pipe may be damaged by vehicle loading. At sea, spanned sections of pipe are vulnerable to ocean current loading and also to snagging by stray anchors in shallow waters. A vibrating `pig' has been developed and tested on buried pipelines. Certain features of pipe support, such as voids and hard spots, display characteristic responses to vibration, and these are measured by the vibrating pig. Post-processing of the measured vibration data is used to produce a graphical representation of the pipeline support and certain `feature characteristics' are identified. In field tests on a pipeline with deliberately constructed support faults, features detected by the vibrating pig are in good agreement with the known construction.

A fully integrated 660 MHz low-swing energy-recycling DC-DC converter

A fully integrated 0.18 μm DC-DC buck converter using a low-swing "stacked driver" configuration is reported in this paper. A high switching frequency of 660 MHz reduces filter components to fit on chip, but this suffers from high switching losses. These losses are reduced using: 1) low-swing drivers; 2) supply stacking; and 3) introducing a charge transfer path to deliver excess charge from the positive metal-oxide semiconductor drive chain to the load, thereby recycling the charge. The working prototype circuit converts 2.2 to 0.75-1.0 V at 40-55 mA. Design and simulation of an improved circuit is also included that further improves the efficiency by enhancing the charge recycling path, providing automated zero voltage switching (ZVS) operation, and synchronizing the half-swing gating signals. © 2009 IEEE.