4 resultados para simian-virus-40 (SV40) large tumour-antigen nuclear localization sequence

em Cambridge University Engineering Department Publications Database


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Antibody orientation and its antigen binding efficiency at interface are of particular interest in many immunoassays and biosensor applications. In this paper, spectroscopic ellipsometry (SE), neutron reflection (NR), and dual polarization interferometry (DPI) have been used to investigate interfacial assembly of the antibody [mouse monoclonal anti-human prostate-specific antigen (anti-hPSA)] at the silicon oxide/water interface and subsequent antigen binding. It was found that the mass density of antibody adsorbed at the interface increased with solution concentration and adsorption time while the antigen binding efficiency showed a steady decline with increasing antibody amount at the interface over the concentration range studied. The amount of antigen bound to the interfacial immobilized antibody reached a maximum when the surface-adsorbed amount of antibody was around 1.5 mg/m(2). This phenomenon is well interpreted by the interfacial structural packing or crowding. NR revealed that the Y-shaped antibody laid flat on the interface at low surface mass density with a thickness around 40 Å, equivalent to the short axial length of the antibody molecule. The loose packing of the antibody within this range resulted in better antigen binding efficiency, while the subsequent increase of surface-adsorbed amount led to the crowding or overlapping of antibody fragments, hence reducing the antigen binding due to the steric hindrance. In situ studies of antigen binding by both NR and DPI demonstrated that the antigen inserted into the antibody layer rather than forming an additional layer on the top. Stability assaying revealed that the antibody immobilized at the silica surface remained stable and active over the monitoring period of 4 months. These results are useful in forming a general understanding of antibody interfacial behavior and particularly relevant to the control of their activity and stability in biosensor development.

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The Fort Canning Tunnel is the first road tunnel in Singapore to be built using the sprayed concrete lining (SCL) method. The major technical challenge of this was to construct a 15m wide tunnel by mining in soft ground under a shallow overburden of 3m to 9m. This paper describes the geotechnical investigations and monitoring controls for the safe and progressive execution of the works, such as soil investigations, trial forepoling works, surface settlement monitoring, tunnel settlement monitoring, face movement monitoring, and the observational approach to construction. The monitored field data showed the volume loss to range from 0.4% to 2.1%, and the observed surface settlement trough was found to agree well with the theoretical Gaussian trough. Other observations made include substantial surface settlements induced by the stress relief at and ahead of the tunnel face in spite of the forepoling umbrella, and the higher volume losses associated with higher overburden. Tunnel face movements were observed during installation of forepoling. These observations are of interest to engineers planning future SCL tunnels in similar conditions.

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Metal-catalyst-free chemical vapor deposition (CVD) of large area uniform nanocrystalline graphene on oxidized silicon substrates is demonstrated. The material grows slowly, allowing for thickness control down to monolayer graphene. The as-grown thin films are continuous with no observable pinholes, and are smooth and uniform across whole wafers, as inspected by optical-, scanning electron-, and atomic force microscopy. The sp 2 hybridized carbon structure is confirmed by Raman spectroscopy. Room temperature electrical measurements show ohmic behavior (sheet resistance similar to exfoliated graphene) and up to 13 of electric-field effect. The Hall mobility is ∼40 cm 2/Vs, which is an order of magnitude higher than previously reported values for nanocrystalline graphene. Transmission electron microscopy, Raman spectroscopy, and transport measurements indicate a graphene crystalline domain size ∼10 nm. The absence of transfer to another substrate allows avoidance of wrinkles, holes, and etching residues which are usually detrimental to device performance. This work provides a broader perspective of graphene CVD and shows a viable route toward applications involving transparent electrodes. © 2012 American Institute of Physics.

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Optical technologies have received large interest in recent years for use in board-level interconnects. Polymer multimode waveguides in particular, constitute a promising technology for high-capacity optical backplanes as they can be cost-effectively integrated onto conventional printed circuit boards (PCBs). This paper presents the first optical backplane demonstrator based on the use of PCB-integrated polymer multimode waveguides and a regenerative shared bus architecture. The backplane demonstrator is formed with commercially-available low-cost electronic and photonic components onto conventional FR4 substrates and comprises two opto-electronic (OE) bus modules interconnected via a prototype regenerator unit. The system enables interconnection between the connected cards over four optical channels, each operating at 10 Gb/s. Bus extension is achieved by cascading OE bus modules via 3R regenerator units, overcoming therefore the inherent limitation of optical bus topologies in the maximum number of cards that can be connected to the bus. Details of the design, fabrication, and assembly of the different parts of this optical bus backplane are presented and related optical and data transmission characterisation studies are reported. The optical layer of the OE bus modules comprises a four-channel three-card waveguide layout that is compatible with VCSEL/PD arrays and ribbon fibres. All on-board optical paths exhibit insertion losses below 13 dB and intra-channel crosstalk lower than -29 dB. The robustness of the signal distribution from the bus inputs to all respective bus output ports in the presence of input misalignment is demonstrated, while 1 dB input alignment tolerances of approximately ±10 μm are obtained. The electrical layer of the OE bus modules comprises the essential driving circuitry for 1×4 VCSEL and PD arrays and the corresponding control and power regulation circuits. The interface between the optical and electrical layers of the bus modules is achieved with simple OE connectors that enable end-fired optical coupling into and out of the on-board polymer waveguides. The backplane demonstrator achieves error-free (BER < 10-12) 10 Gb/s data transmission over each optical channel, enabling therefore, an aggregate interconnection capacity of 40 Gb/s between any connected cards. © 1983-2012 IEEE.