Vortex breaking and cutting in type II superconductors.

In technological superconductors, the Lorentz force on the flux vortices is opposed by inhomogeneous pinning and so the critical current may be controlled by a combination of vortex entanglement, cutting, and cross-joining. To understand the roles of these processes we report measurements of structures in which a weak pinning layer is sandwiched between two strongly pinning leads. Quantitative modeling of the results demonstrates that in such systems the critical current is limited by the deformation of individual vortices and not by subsequent cross-joining processes.

Evidence of quantum lateral confinement in side-gated resonant tunnelling diodes formed by patterned substrate regrowth

MBE regrowth on patterned np-GaAs wafers has been used to fabricate GaAs/AlGaAs double barrier resonant tunnel diodes with a side-gate in the plane of the quantum well. The physical diameters vary from 1 to 20 μm. For a nominally 1 μm diameter diode the peak current is reduced by more than 95% at a side-gate voltage of -2 V at 1.5 K, which we estimate corresponds to an active tunnel region diameter of 75 nm ± 10 nm. At high gate biases additional structure appears in the conductance data. Differential I-V measurements show a linear dependence of the spacing of subsidiary peaks on gate bias indicating lateral quantum confinement. © 1996 American Institute of Physics.

High temperature direct double side cooled inverter module for hybrid electric vehicle application

In this paper a novel approach to the design and fabrication of a high temperature inverter module for hybrid electrical vehicles is presented. Firstly, SiC power electronic devices are considered in place of the conventional Si devices. Use of SiC raises the maximum practical operating junction temperature to well over 200°C, giving much greater thermal headroom between the chips and the coolant. In the first fabrication, a SiC Schottky barrier diode (SBD) replaces the Si pin diode and is paired with a Si-IGBT. Secondly, double-sided cooling is employed, in which the semiconductor chips are sandwiched between two substrate tiles. The tiles provide electrical connections to the top and the bottom of the chips, thus replacing the conventional wire bonded interconnect. Each tile assembly supports two IGBTs and two SBDs in a half-bridge configuration. Both sides of the assembly are cooled directly using a high-performance liquid impingement system. Specific features of the design ensure that thermo-mechanical stresses are controlled so as to achieve long thermal cycling life. A prototype 10 kW inverter module is described incorporating three half-bridge sandwich assemblies, gate drives, dc-link capacitance and two heat-exchangers. This achieves a volumetric power density of 30W/cm3.

Fabrication of self-aligned side gates to carbon nanotubes

We have fabricated self-aligned, side-gated suspended multi-walled carbon nanotubes (MWCNTs), with nanotube-to-gate spacing of less than 10 nm. Evaporated metal forms an island on a suspended MWCNT, the island and the nanotube act as a mask shielding the substrate, and lift-off then removes the metal island, leaving a set of self-aligned side gates. Al, Cr, Au, and Ti were investigated and the best results were obtained with Cr, at a yield of over 90%.