69 resultados para range-gated

em Cambridge University Engineering Department Publications Database


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The IGBT has become the device of choice in many high-voltage-power electronic applications, by virtue of combining the ease of MOS gate control with an acceptable forward voltage drop. However, designers have retained an interest in MOS gated thyristor structures which have a turn-off capability. These offer low on-state losses as a result of their latching behaviour. Recently, there have been various proposals for dual-gate devices that have a thyristor on-state with IGBT-like switching. Many of these dual gated structures rely on advanced MOS technology, with inherent manufacturing difficulties. The MOS and bipolar gated thyristor offers all the advantages of dual gated performance, while employing standard IGBT processing techniques. The paper describes the MBGT in detail, and presents experimental and simulation results for devices based on realistic commercial processes. It is shown that the MBGT represents a viable power semiconductor device technology, suitable for a diverse range of applications. © IEE, 1998.

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MBE regrowth on patterned np-GaAs wafers has been used to fabricate GaAs/AlGaAs double barrier resonant tunnel diodes with a side-gate in the plane of the quantum well. The physical diameters vary from 1 to 20 μm. For a nominally 1 μm diameter diode the peak current is reduced by more than 95% at a side-gate voltage of -2 V at 1.5 K, which we estimate corresponds to an active tunnel region diameter of 75 nm ± 10 nm. At high gate biases additional structure appears in the conductance data. Differential I-V measurements show a linear dependence of the spacing of subsidiary peaks on gate bias indicating lateral quantum confinement. © 1996 American Institute of Physics.

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This paper reports the fabrication and electrical characterization of high tuning range AlSi RF MEMS capacitors. We present experimental results obtained by a surface micromachining process that uses dry etching of sacrificial amorphous silicon to release Al-1%Si membranes and has a low thermal budget (<450 °C) being compatible with CMOS post-processing. The proposed silicon sacrificial layer dry etching (SSLDE) process is able to provide very high Si etch rates (3-15 μm/min, depending on process parameters) with high Si: SiO2 selectivity (>10,000:1). Single- and double-air-gap MEMS capacitors, as well as some dedicated test structures needed to calibrate the electro-mechanical parameters and explore the reliability of the proposed technology, have been fabricated with the new process. S-parameter measurements from 100 MHz up to 2 GHz have shown a capacitance tuning range higher than 100% with the double-air-gap architecture. The tuning range can be enlarged with a proper DC electrical bias of the capacitor electrodes. Finally, the reported results make the proposed MEMS tuneable capacitor a good candidate for above-IC integration in communications applications. © 2004 Elsevier B.V. All rights reserved.

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We demonstrate the production of integrated-gate nanocathodes which have a single carbon nanotube or silicon nanowire/whisker per gate aperture. The fabrication is based on a technologically scalable, self-alignment process in which a single lithographic step is used to define the gate, insulator, and emitter. The nanotube-based gated nanocathode array has a low turn-on voltage of 25 V and a peak current of 5 μA at 46 V, with a gate current of 10 nA (i.e., 99% transparency). These low operating voltage cathodes are potentially useful as electron sources for field emission displays or miniaturizing electron-based instrumentation.