A packaging technique for silicon MEMS strain sensors on steel

A packaging technique suited to applying MEMS strain sensors realized on a silicon chip to a steel flat surface is described. The method is based on adhesive bonding of the silicon chip rear surface on steel using two types of glue normally used for standard piezoresistive strain sensors (Mbond200/ 600), using direct wire bonding of the chip to a Printed Circuit Board, also fixed on steel. In order to protect the sensor from the external environment, and to improve the MEMS performance, the silicon chip is encapsulated with a metal cap hermetically sealed-off under vacuum condition with a vacuum adhesive in which the bonding wires are also protected from possible damage. In order to evaluate the mechanical coupling of the silicon chip with the bar and thestress transfer extent to the silicon surface, commercial strain sensors have been applied on the chip glued on a steel bar in alaboratory setup able to generate strain by inflection, yielding a stress transfer around 70% from steel to silicon. © 2008 IEEE.

Fabrication and testing of a high resolution extensometer based on resonant MEMS strain sensors

A novel type of linear extensometer with exceptionally high resolution of 4 nm based on MEMS resonant strain sensors bonded on steel and operating in a vacuum package is presented. The tool is implemented by means of a steel thin bar that can be pre-stressed in tension within two fixing anchors. The extension of the bar is detected by using two vacuum-packaged resonant MEMS double- ended tuning fork (DETF) sensors bonded on the bar with epoxy glue, one of which is utilized for temperature compensation. Both sensors are driven by a closed loop self-oscillating transresistance amplifier feedback scheme implemented on a PCB (Printed Circuit Board). On the same board, a microcontroller-based frequency measurement circuit is also implemented, which is able to count the square wave fronts of the MEMS oscillator output with a resolution of 20 nsec. The system provides a frequency noise of 0.2 Hz corresponding to an extension resolution of 4 nm for the extensometer. Nearly perfect temperature compensation of the frequency output is achieved in the temperature range 20-35 C using the reference sensor. © 2011 IEEE.

Cost-effective 10 Gb/s polymer-based chip-to-chip optical interconnect

Board-level optical links are an attractive alternative to their electrical counterparts as they provide higher bandwidth and lower power consumption at high data rates. However, on-board optical technology has to be cost-effective to be commercially deployed. This study presents a chip-to-chip optical interconnect formed on an optoelectronic printed circuit board that uses a simple optical coupling scheme, cost-effective materials and is compatible with well-established manufacturing processes common to the electronics industry. Details of the link architecture, modelling studies of the link's frequency response, characterisation of optical coupling efficiencies and dynamic performance studies of this proof-of-concept chip-to-chip optical interconnect are reported. The fully assembled link exhibits a -3 dBe bandwidth of 9 GHz and -3 dBo tolerances to transverse component misalignments of ±25 and ±37 μm at the input and output waveguide interfaces, respectively. The link has a total insertion loss of 6 dBo and achieves error-free transmission at a 10 Gb/s data rate with a power margin of 11.6 dBo for a bit-error-rate of 10 -12. The proposed architecture demonstrates an integration approach for high-speed board-level chip-to-chip optical links that emphasises component simplicity and manufacturability crucial to the migration of such technology into real-world commercial systems. © 2012 The Institution of Engineering and Technology.

Polymer-based board-level optical interconnects

This paper provides an overview of the rationale behind the significant interest in polymer-based on-board optical links together with a brief review of recently reported work addressing certain challenges in this field. Polymer-based optical links have garnered considerable research attention due to their important functional attributes and compelling cost-benefit advantages in on-board optoelectronic systems as they can be cost-effectively integrated on conventional printed circuit boards. To date, significant work on the polymer materials, their fabrication process and their integration on standard board substrates have enabled the demonstration of numerous high-speed on-board optical links. However, to be deployed in real-world systems, these optoelectronic printed circuit boards (OE PCBs) must also be cost-effective. Here, recent advances in the integration process focusing on simple direct end-fire coupling schemes and the use of low-cost FR4 PCB substrates are presented. Performance of two proof-of-principle 10 Gb/s systems based on this integration method are summarised while work in realising more complex yet compact planar optical components is outlined. © 2011 IEEE.

Polymer waveguide-based backplanes for board-level optical interconnects

Optical interconnects are increasingly considered for use in high-performance electronic systems. Multimode polymer waveguides are a promising technology for the formation of optical backplane as they enable cost-effective integration of optical links onto standard printed circuit boards. In this paper, two different types of polymer waveguide-based optical backplanes are presented. The first one implements a passive shuffle architecture enabling non-blocking on-board optical interconnection between different cards/modules, while the second one deploys a regenerative bus architecture allowing the interconnection of an arbitrary number of electrical cards over a common optical bus. The polymer materials and the multimode waveguide components used to form the optical backplanes are presented, while details of the interconnection architectures and design of the backplanes are described. Proof-of-principle demonstrators fabricated onto low-cost FR4 substrates, including a 10-card 1 Tb/s-capacity passive shuffle router and 4-channel 3-card polymeric bus modules, are reported and their optical performance characteristics are presented. Low-loss, low-crosstalk on-board interconnection is achieved and error-free (BER10 12) 10 Gb/s communication between different card/module interfaces is demonstrated in both polymeric backplane systems. © 2012 IEEE.

A polymer waveguide-based 40 Gb/s optical bus backplane for board-level optical interconnects

Optical interconnects are increasingly considered for use in high-performance electronic systems. Multimode polymer waveguides are a promising technology for the formation of optical backplanes as they enable cost-effective integration of optical links onto standard printed circuit boards. In this paper, we present a 40 Gb/s optical backplane demonstrator based on the use of polymer multimode waveguides and a regenerative shared bus architecture. The system allows bus extension by cascading multiple polymeric bus modules through 3R regenerator units enabling the connection of an arbitrary number of electrical cards onto the bus. The proof-ofprinciple demonstrator reported here is formed with low-cost, commercially-available active devices and electronic components mounted on conventional FR4 substrates and achieves error-free 4×10 Gb/s optical interconnection between any two card interfaces on the bus. © 2013 IEEE.

Multimode polymer waveguide components for complex on-board optical topologies

Multimode polymer waveguides are an attractive transmission medium for board-level optical links as they provide high bandwidth, relaxed alignment tolerances, and can be directly integrated onto conventional printed circuit boards. However, the performance of multimode waveguide components depends on the launch conditions at the component input, complicating their use in topologies that require the concatenation of multiple multimode components. This paper presents key polymer components for a multichannel optical bus and reports their performance under different launch conditions, enabling useful rules that can be used to design complex interconnection topologies to be derived. The components studied are multimode signal splitters and combiners, 90°-crossings, S-bends, and 90°-bends. By varying the width of the splitter arms, a splitting ratio between 1% and 95% is achieved from the 1 × 2 splitters, while low-loss signal combining is demonstrated with the waveguide combiners. It is shown that a 3 dB improvement in the combiner excess loss can be achieved by increasing the bus width by 50 μm. The worst-case insertion loss of 50 × 100 μm waveguide crossings is measured to be 0.1 dB/crossing. An empirical method is proposed and used to estimate the insertion losses of on-board optical paths of a polymeric four-channel optical bus module. Good agreement is achieved between the predicted and measured values. Although the components and empirical method have been tailored for use in a multichannel optical bus architecture, they can be used for any on-board optical interconnection topology. © 1983-2012 IEEE.

Low-cost PCB-integrated 10-Gb/s optical transceiver built with a novel integration method

A novel integration method for the production of cost-effective optoelectronic printed circuit boards (OE PCBs) is presented. The proposed integration method allows fabrication of OE PCBs with manufacturing processes common to the electronics industry while enabling direct attachment of electronic components onto the board with solder reflow processes as well as board assembly with automated pick-and-place tools. The OE PCB design is based on the use of polymer multimode waveguides, end-fired optical coupling schemes, and simple electro-optic connectors, eliminating the need for additional optical components in the optical layer, such as micro-mirrors and micro-lenses. A proof-of-concept low-cost optical transceiver produced with the proposed integration method is presented. This transceiver is fabricated on a low-cost FR4 substrate, comprises a polymer Y-splitter together with the electronic circuitry of the transmitter and receiver modules and achieves error-free 10-Gb/s bidirectional data transmission. Theoretical studies on the optical coupling efficiencies and alignment tolerances achieved with the employed end-fired coupling schemes are presented while experimental results on the optical transmission characteristics, frequency response, and data transmission performance of the integrated optical links are reported. The demonstrated optoelectronic unit can be used as a front-end optical network unit in short-reach datacommunication links. © 2011-2012 IEEE.

A 40 Gb/s optical bus for optical backplane interconnections

Optical technologies have received large interest in recent years for use in board-level interconnects. Polymer multimode waveguides in particular, constitute a promising technology for high-capacity optical backplanes as they can be cost-effectively integrated onto conventional printed circuit boards (PCBs). This paper presents the first optical backplane demonstrator based on the use of PCB-integrated polymer multimode waveguides and a regenerative shared bus architecture. The backplane demonstrator is formed with commercially-available low-cost electronic and photonic components onto conventional FR4 substrates and comprises two opto-electronic (OE) bus modules interconnected via a prototype regenerator unit. The system enables interconnection between the connected cards over four optical channels, each operating at 10 Gb/s. Bus extension is achieved by cascading OE bus modules via 3R regenerator units, overcoming therefore the inherent limitation of optical bus topologies in the maximum number of cards that can be connected to the bus. Details of the design, fabrication, and assembly of the different parts of this optical bus backplane are presented and related optical and data transmission characterisation studies are reported. The optical layer of the OE bus modules comprises a four-channel three-card waveguide layout that is compatible with VCSEL/PD arrays and ribbon fibres. All on-board optical paths exhibit insertion losses below 13 dB and intra-channel crosstalk lower than -29 dB. The robustness of the signal distribution from the bus inputs to all respective bus output ports in the presence of input misalignment is demonstrated, while 1 dB input alignment tolerances of approximately ±10 μm are obtained. The electrical layer of the OE bus modules comprises the essential driving circuitry for 1×4 VCSEL and PD arrays and the corresponding control and power regulation circuits. The interface between the optical and electrical layers of the bus modules is achieved with simple OE connectors that enable end-fired optical coupling into and out of the on-board polymer waveguides. The backplane demonstrator achieves error-free (BER < 10-12) 10 Gb/s data transmission over each optical channel, enabling therefore, an aggregate interconnection capacity of 40 Gb/s between any connected cards. © 1983-2012 IEEE.

A comparative study of plasma-enhanced chemical vapor gate dielectrics for solution-processed polymer thin-film transistor circuit integration

This paper considers plasma-enhanced chemical vapor deposited (PECVD) silicon nitride (SiNx) and silicon oxide (SiOx) as gate dielectrics for organic thin-film transistors (OTFTs), with solution-processed poly[5, 5′ -bis(3-dodecyl-2-thienyl)-2, 2′ -bithiophene] (PQT-12) as the active semiconductor layer. We examine transistors with SiNx films of varying composition deposited at 300 °C as well as 150 °C for plastic compatibility. The transistors show over 100% (two times) improvement in field-effect mobility as the silicon content in SiNx increases, with mobility (μFE) up to 0.14 cm2 /V s and on/off current ratio (ION / IOFF) of 108. With PECVD SiOx gate dielectric, preliminary devices exhibit a μFE of 0.4 cm2 /V s and ION / IOFF of 108. PQT-12 OTFTs with PECVD SiNx and SiOx gate dielectrics on flexible plastic substrates are also presented. These results demonstrate the viability of using PECVD SiN x and SiOx as gate dielectrics for OTFT circuit integration, where the low temperature and large area deposition capabilities of PECVD films are highly amenable to integration of OTFT circuits targeted for flexible and lightweight applications. © 2008 American Institute of Physics.

A general design method for electric machines using magnetic circuit model considering the flux saturation problem

This paper proposes an analytical approach that is generalized for the design of various types of electric machines based on a physical magnetic circuit model. Conventional approaches have been used to predict the behavior of electric machines but have limitations in accurate flux saturation analysis and hence machine dimensioning at the initial design stage. In particular, magnetic saturation is generally ignored or compensated by correction factors in simplified models since it is difficult to determine the flux in each stator tooth for machines with any slot-pole combinations. In this paper, the flux produced by stator winding currents can be calculated accurately and rapidly for each stator tooth using the developed model, taking saturation into account. This aids machine dimensioning without the need for a computationally expensive finite element analysis (FEA). A 48-slot machine operated in induction and doubly-fed modes is used to demonstrate the proposed model. FEA is employed for verification.