Unified circuit model for the polysilicon TFT

This paper proposes two methods to improve the modelling of thin film transistors (TFTs). The first involves integrating Poissons equation numerically, given a density of trap states and other relevant material parameters including a constant mobility. Theresult is conductance as a numerical function of gate voltage. The second method recognizes that the data for areal conductance found by numerical integration, may easily be found by measurement without making assumptions about the density of trap states.