FPGA, physics-based modeling of IGBT and pin diode for hardware co-simulation of complex power electronic converters and systems

This paper presents the steps and the challenges for implementing analytical, physics-based models for the insulated gate bipolar transistor (IGBT) and the PIN diode in hardware and more specifically in field programmable gate arrays (FPGAs). The models can be utilised in hardware co-simulation of complex power electronic converters and entire power systems in order to reduce the simulation time without compromising the accuracy of results. Such a co-simulation allows reliable prediction of the system's performance as well as accurate investigation of the power devices' behaviour during operation. Ultimately, this will allow application-specific optimisation of the devices' structure, circuit topologies as well as enhancement of the control and/or protection schemes.

Modeling sub-threshold current-voltage characteristics in thin film transistors

In this paper, we present a physically-based compact model for the sub-threshold behavior in a TFT with an amorphous semiconductor channel. Both drift and diffusion current components are considered and combined using an harmonic average. Here, the diffusion component describes the exponential current behavior due to interfacial deep states, while the drift component is associated with presence of localized deep states formed by dangling bonds broken from weak bonds in the bulk and follows a power law. The proposed model yields good agreement with measured results. © 2013 IEEE.

Modeling current-voltage behaviour in oxide TFTs combining trap-limited conduction with percolation

Current-voltage behaviour of oxide TFTs is modeled based on trap-limited conduction and percolation theories. The mobility has a power-law dependence, in which percolation controls the exponent while trap states determine constant term in the power law. The proposed model, which is fully physically-based, provides a good agreement with measured transistor characteristics as well as transient operations of fabricated pixel test circuits for oxide-based OLED displays. © 2013 Society for Information Display.

Analytical field-effect method for extraction of subgap states in thin-film transistors

We present an analytical field-effect method to extract the density of subgap states (subgap DOS) in amorphous semiconductor thin-film transistors (TFTs), using a closed-form relationship between surface potential and gate voltage. By accounting the interface states in the subthreshold characteristics, the subgap DOS is retrieved, leading to a reasonably accurate description of field-effect mobility and its gate voltage dependence. The method proposed here is very useful not only in extracting device performance but also in physically based compact TFT modeling for circuit simulation. © 2012 IEEE.

Damage development in an armor ceramic under quasi-static indentation

The objective of the present study is to assess the capabilities of a recently developed mechanism-based model for inelastic deformation and damage in structural ceramics. In addition to conventional lattice plasticity, the model accounts for microcrack growth and coalescence as well as granular flow following comminution. The assessment is made through a coupled experimental/computational study of the indentation response of a commercial armor ceramic. The experiments include examinations of subsurface damage zones along with measurements of residual surface profiles and residual near-surface stresses. Extensive finite element computations are conducted in parallel. Comparisons between experiment and simulation indicate that the most discriminating metric in the assessment is the spatial extent of subsurface damage following indentation. Residual stresses provide additional validation. In contrast, surface profiles of indents are dictated largely by lattice plasticity and thus provide minimal additional insight into the inelastic deformation resulting from microcracking or granular flow. A satisfactory level of correlation is obtained using property values that are either measured directly or estimated from physically based arguments, without undue reliance on adjustable (nonphysical) parameters. © 2011 The American Ceramic Society.

The calculation of acoustic shielding of engine noise by the Silent Aircraft Airframe

The Silent Aircraft airframe has a flying wing design with a large wing planform and a propulsion system embedded in the rear of the airframe with intake on the upper surface of the wing. In the present paper, boundary element calculations are presented to evaluate acoustic shielding at low frequencies. Besides the three-dimensional geometry of the Silent Aircraft airframe, a few two-dimensional problems are considered that provide some physical insight into the shielding calculations. Mean flow refraction effects due to forward flight motion are accounted for by a simple time transformation that decouples the mean-flow and acoustic-field calculations. It is shown that significant amount of shielding can be obtained in the shadow region where there is no direct line of sight between the source and observer. The boundary element solutions are restricted to low frequencies. We have used a simple physically-based model to extend the solution to higher frequencies. Based on this model, using a monopole acoustic source, we predict at least an 18 dBA reduction in the overall sound pressure level of forward-propagating fan noise because of shielding.

Fast and compact simulation models for a variety of FET nano devices by the CMOS EKV equations

In this paper we explore the possibility of using the equations of a well known compact model for CMOS transistors as a parameterized compact model for a variety of FET based nano-technology devices. This can turn out to be a practical preliminary solution for system level architectural researchers, who could simulate behaviourally large scale systems, while more physically based models become available for each new device. We have used a four parameter version of the EKV model equations and verified that fitting errors are similar to those when using them for standard CMOS FET transistors. The model has been used for fitting measured data from three types of FET nano-technology devices obeying different physics, for different fabrication steps, and under different programming conditions. © 2009 IEEE NANO Organizers.