24 resultados para optimising compiler

em Cambridge University Engineering Department Publications Database


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A SPICE simulation model of a novel cascode switch that combines a high voltage normally-on silicon carbide (SiC) junction field effect transistor (JFET) with a low voltage enhancement-mode gallium nitride field effect transistor (eGaN FET) has been developed, with the aim of optimising cascode switching performance. The effect of gate resistance on stability and switching losses is investigated and optimum values chosen. The effects of stray inductance on cascode switching performance are considered and the benefits of low inductance packaging discussed. The use of a positive JFET gate bias in a cascode switch is shown to reduce switching losses as well as reducing on-state losses. The findings of the simulation are used to produce a list of priorities for the design and layout of wide-bandgap cascode switches, relevant to both SiC and GaN high voltage devices. © 2013 IEEE.

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This paper uses finite element (FE) analysis to examine the residual stresses generated during the TIG welding of aluminium aerospace alloys. It also looks at whether such an approach could be useful for evaluating the effectiveness of various residual stress control techniques. However, such simulations cannot be founded in a vacuum. They require accurate measurements to refine and validate them. The unique aspect of this work is that two powerful engineering techniques are combined: FE modelling and neutron diffraction. Weld trials were performed and the direct measurement of residual strain made using the ENGIN neutron diffraction strain scanning facility. The predicted results show an excellent agreement with experimental values. Finally this model is used to simulate a weld made using a "Low Stress No Distortion" (LSND) technique. Although the stress reduction predicted is only moderate, the study suggests the approach to be a quick and efficient means of optimising such techniques.

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The maintenance of the growth of the multibillion-dollar semiconductor industry requires the development of techniques for the fabrication and characterisation of nanoscale devices. Consequently, there is great interest in photolithography techniques such as extreme UV and x-ray. Both of these techniques are extremely expensive and technologically very demanding. In this paper we describe research on the feasibility of exploiting x-ray propagation within carbon nanotubes (CNT's) for the fabrication and characterisation of nanoscale devices. This work discusses the parameters determining the design space available. To demonstrate experimentally the feasibility of x-ray propagation, arrays of carbon nanotubes have been grown on silicon membranes. The latter are required to provide structural support for the CNT's while minimising energy loss. To form a waveguide metal is deposited between the nanotubes to block x-ray transmission in this region at the same time as cladding the CNT's. The major challenge has been to fill the spaces between the CNT's with material of sufficient thickness to block x-ray transmission while maintaining the structural integrity of the CNT's. Various techniques have been employed to fill the gaps between the nanotubes including electroplating, sputtering and evaporation. This work highlights challenges encountered in optimising the process.

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Multi-objective Genetic Algorithms have become a popular choice to aid in optimising the size of the whole hybrid power train. Within these optimisation processes, other optimisation techniques for the control strategy are implemented. This optimisation within an optimisation requires many simulations to be run, so reducing the computational cost is highly desired. This paper presents an optimisation framework consisting of a series hybrid optimisation algorithm, in which a global search optimizes a submarine propulsion system using low-fidelity models and, in order to refine the results, a local search is used with high-fidelity models. The effectiveness of the Hybrid optimisation algorithm is demonstrated with the optimisation of a submarine propulsion system. © 2011 EPE Association - European Power Electr.

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This work is aimed at optimising the static performance of a high voltage SOI LDMOSFET. Starting with a conventional LDMOSFET, 2D and 3D numerical simulation models, able to accurately match datasheet values, have been developed. Moving from the original device, several design techniques have been investigated with the target of improving the breakdown voltage and the ON-state resistance. The considered design techniques are based on the modification of the doping profile of the drift region and the Superjunction design technique. The paper shows that a single step doping within the drift region is the best design choice for the considered device and is found to give a 24% improvement in the breakdown voltage and a 17% reduction of the ON-state resistance. © 2011 IEEE.