21 resultados para metal-insulator interfaces

em Cambridge University Engineering Department Publications Database


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We have grown epitaxially orientation-controlled monoclinic VO2 nanowires without employing catalysts by a vapor-phase transport process. Electron microscopy results reveal that single crystalline VO2 nanowires having a [100] growth direction grow laterally on the basal c plane and out of the basal r and a planes of sapphire, exhibiting triangular and rectangular cross sections, respectively. In addition, we have directly observed the structural phase transition of single crystalline VO2 nanowires between the monoclinic and tetragonal phases which exhibit insulating and metallic properties, respectively, and clearly analyzed their corresponding relationships using in situ transmission electron microscopy.

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We demonstrate that the Mott metal-insulator transition (MIT) in single crystalline VO(2) nanowires is strongly mediated by surface stress as a consequence of the high surface area to volume ratio of individual nanowires. Further, we show that the stress-induced antiferromagnetic Mott insulating phase is critical in controlling the spatial extent and distribution of the insulating monoclinic and metallic rutile phases as well as the electrical characteristics of the Mott transition. This affords an understanding of the relationship between the structural phase transition and the Mott MIT.

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Hydrogenated amorphous silicon (a-Si:H) thin films have been deposited from silane using a novel photo-enhanced decomposition technique. The system comprises a hydrogen discharge lamp contained within the reaction vessel; this unified approach allows high energy photon excitation of the silane molecules without absorption by window materials or the need for mercury sensitisation. The film growth rates (exceeding 4 Angstrom/s) and material properties obtained are comparable to those of films produced by plasma-enhanced CVD techniques. The reduction of energetic charged particles in the film growth region should enable the fabrication of cleaner semiconductor/insulator interfaces in thin-film transistors.