20 resultados para intel processor

em Cambridge University Engineering Department Publications Database


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Computer generated holography is an extremely demanding and complex task when it comes to providing realistic reconstructions with full parallax, occlusion, and shadowing. We present an algorithm designed for data-parallel computing on modern graphics processing units to alleviate the computational burden. We apply Gaussian interpolation to create a continuous surface representation from discrete input object points. The algorithm maintains a potential occluder list for each individual hologram plane sample to keep the number of visibility tests to a minimum.We experimented with two approximations that simplify and accelerate occlusion computation. It is observed that letting several neighboring hologramplane samples share visibility information on object points leads to significantly faster computation without causing noticeable artifacts in the reconstructed images. Computing a reduced sample set via nonuniform sampling is also found to be an effective acceleration technique. © 2009 Optical Society of America.

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We propose a novel label processor which can recognize multiple spectral-amplitude-code labels using four-wave-mixing sidebands and selective optical filtering. Ten code-labels x 10 Gbps variable-length packets are transmitted over a 200 km single-hop switched network.

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We propose a low latency optical data center top of rack switch using recirculation buffering and a hybrid MZ/SOA switch architecture to reduce the network power dissipated on future optically connected server chips by 53%. © OSA 2014.

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This paper describes the development of an automated design optimization system that makes use of a high fidelity Reynolds-Averaged CFD analysis procedure to minimize the fan forcing and fan BOGV (bypass outlet guide vane) losses simultaneously taking into the account the down-stream pylon and RDF (radial drive fairing) distortions. The design space consists of the OGV's stagger angle, trailing-edge recambering, axial and circumferential positions leading to a variable pitch optimum design. An advanced optimization system called SOFT (Smart Optimisation for Turbomachinery) was used to integrate a number of pre-processor, simulation and in-house grid generation codes and postprocessor programs. A number of multi-objective, multi-point optimiztion were carried out by SOFT on a cluster of workstations and are reported herein.

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A modular image capture system with close integration to CCD cameras has been developed. The aim is to produce a system capable of integrating CCD sensor, image capture and image processing into a single compact unit. This close integration provides a direct mapping between CCD pixels and digital image pixels. The system has been interfaced to a digital signal processor board for the development and control of image processing tasks. These have included characterization and enhancement of noisy images from an intensified camera and measurement to subpixel resolutions. A highly compact form of the image capture system is in an advanced stage of development. This consists of a single FPGA device and a single VRAM providing a two chip image capturing system capable of being integrated into a CCD camera. A miniature compact PC has been developed using a novel modular interconnection technique, providing a processing unit in a three dimensional format highly suited to integration into a CCD camera unit. Work is under way to interface the compact capture system to the PC using this interconnection technique, combining CCD sensor, image capture and image processing into a single compact unit. ©2005 Copyright SPIE - The International Society for Optical Engineering.

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Progress in simulating chevron nozzle jet flows using ILES/RANS-ILES approaches and using the Ffowcs Williams and Hawkings (FW-H) surface integral method to predict the radiated far field sound is presented in this paper. With the focus on the realistic chevron geometries, SMC001 and SMC006, coarse and fine meshes are generated in the range of 3∼13 million mesh cells. Throughout this work, to minimize numerical dissipation introduced by mesh quality issues, the hexahedral cell type is used. Numerical simulations are then carried out with cell-vertex and cell-centered codes. Despite the modest grids, mean velocities and turbulent statistics are found to be in reasonable accord with measurements. Also, far field sound levels predicted by the FW-H post processor are encouraging. Copyright © 2008 by the American Institute of Aeronautics and Astronautics, Inc.

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A new three-dimensional Navier-Stokes solver for flows in turbomachines has been developed. The new solver is based on the latest version of the Denton codes, but has been implemented to run on Graphics Processing Units (GPUs) instead of the traditional Central Processing Unit (CPU). The change in processor enables an order-of-magnitude reduction in run-time due to the higher performance of the GPU. Scaling results for a 16 node GPU cluster are also presented, showing almost linear scaling for typical turbomachinery cases. For validation purposes, a test case consisting of a three-stage turbine with complete hub and casing leakage paths is described. Good agreement is obtained with previously published experimental results. The simulation runs in less than 10 minutes on a cluster with four GPUs. Copyright © 2009 by ASME.

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We present a new software framework for the implementation of applications that use stencil computations on block-structured grids to solve partial differential equations. A key feature of the framework is the extensive use of automatic source code generation which is used to achieve high performance on a range of leading multi-core processors. Results are presented for a simple model stencil running on Intel and AMD CPUs as well as the NVIDIA GT200 GPU. The generality of the framework is demonstrated through the implementation of a complete application consisting of many different stencil computations, taken from the field of computational fluid dynamics. © 2010 IEEE.