124 resultados para buffer layers

em Cambridge University Engineering Department Publications Database


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We demonstrate a method to realize vertically oriented Ge nanowires on Si(111) substrates. Ge nanowires were grown by chemical vapor deposition using Au nanoparticles to seed nanowire growth via a vapor-liquid-solid growth mechanism. Rapid oxidation of Si during Au nanoparticle application inhibits the growth of vertically oriented Ge nanowires directly on Si. The present method employs thin Ge buffer layers grown at low temperature less than 600 degrees C to circumvent the oxidation problem. By using a thin Ge buffer layer with root-mean-square roughness of approximately 2 nm, the yield of vertically oriented Ge nanowires is as high as 96.3%. This yield is comparable to that of homoepitaxial Ge nanowires. Furthermore, branched Ge nanowires could be successfully grown on these vertically oriented Ge nanowires by a secondary seeding technique. Since the buffer layers are grown under moderate conditions without any high temperature processing steps, this method has a wide process window highly suitable for Si-based microelectronics.

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We compare the performance of a typical hole transport layer for organic photovoltaics (OPVs), Poly(3,4-ethylenedioxythiophene) poly(styrenesulfonate) (PEDOT:PSS) thin film with a series of PEDOT:PSS layers doped with silver (Ag) nanoparticles (NPs) of various size distributions. These hybrid layers have attracted great attention as buffer layers in plasmonic OPVs, although there is no report up to date on their isolated performance. In the present study we prepared a series of PEDOT:PSS layers sandwiched between indium tin oxide (ITO) and gold (Au) electrodes. Ag NPs were deposited on top of the ITO by electron beam evaporation followed by spin coating of PEDOT:PSS. Electrical characterization performed in the dark showed linear resistive behavior for all the samples; lower resistance was observed for the hybrid ones. It was found that the resistivity of the samples decreases with increasing the particle's size. A substantial increase of the electric field between the ITO and the Au electrodes was seen through the formation of current paths through the Ag NPs. A striking observation is the slight increase in the slope of the current density versus voltage curves when measured under illumination for the case of the plasmonic layers, indicating that changes in the electric field in the vicinity of the NP due to plasmonic excitation is a non-vanishing factor. © 2014 Published by Elsevier B.V. All rights reserved.

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A critical element for the successful growth of GaN device layers on Si is accurate control of the AlGaN buffer layers used to manage strain. Here we present a method for measuring the composition of the AlGaN buffer layers in device structures which makes use of a one-dimensional x-ray detector to provide efficient measurement of a reciprocal space map which covers the full compositional range from AlN to GaN. Combining this with a suitable x-ray reflection with low strain sensitivity it is possible to accurately determine the Al fraction of the buffer layers independent of their relaxation state. © 2013 IOP Publishing Ltd.

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The performance of polymer-fullerene bulk heterojunction (BHJ) solar cells is strongly dependent on the vertical distribution of the donor and acceptor regions within the BHJ layer. In this work, we investigate in detail the effect of the hole transport layer (HTL) physical properties and the thermal annealing on the BHJ morphology and the solar cell performance. For this purpose, we have prepared solar cells with four distinct formulations of poly(3,4- ethylenedioxythiophene) poly(styrenesulfonate) (PEDOT:PSS) buffer layers. The samples were subjected to thermal annealing, applied either before (pre-annealing) or after (post-annealing) the cathode metal deposition. The effect of the HTL and the annealing process on the BHJ ingredient distribution - namely, poly(3-hexylthiophene) (P3HT) and [6,6]-phenyl C61 butyric acid methyl ester (PCBM) - has been studied by spectroscopic ellipsometry and atomic force microscopy. The results revealed P3HT segregation at the top region of the films, which had a detrimental effect on all pre-annealed devices, whereas PCBM was found to accumulate at the bottom interface. This demixing process depends on the PEDOT:PSS surface energy; the more hydrophilic the surface the more profound is the vertical phase separation within the BHJ. At the same time those samples suffer from high recombination losses as evident from the analysis of the J-V measurements obtained in the dark. Our results underline the significant effect of the HTL-active and active-ETL (electron transport layer) interfacial composition that should be taken into account during the optimization of all polymer-fullerene solar cells. © 2012 The Royal Society of Chemistry.

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We demonstrate the growth of crack-free blue and greenemitting LED structures grown on 2-inch and 6-inch Si(111) substrates by metalorganic vapour phase epitaxy (MOVPE), using AlN nucleation layers and AlGaN buffer layers for stress management. LED device performance and its dependence on threading dislocation (TD) density and emission wavelength were studied. Despite the inherently low light extraction efficiency, an output power of 1.2 mW at 50 mA was measured from a 500 μm square planar device, emitting at 455 nm. The light output decreases dramatically as the emission wavelength increases from 455 nm to 510 nm. For LED devices emitting at similar wavelength, the light output was more than doubled when the TD density was reduced from 5×1 09 cm-2 to 2×109 cm-2. Our results clearly show that high TD density is detrimental to the overall light output, highlighting the need for further TD reduction for structures grown on Si. © 2010 Wiley-VCH Verlag GmbH & Co. KGaA.

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Vertically oriented GaAs nanowires (NWs) are grown on Si(111) substrates using metal-organic chemical vapor deposition. Controlled epitaxial growth along the 111 direction is demonstrated following the deposition of thin GaAs buffer layers and the elimination of structural defects, such as twin defects and stacking faults, is found for high growth rates. By systematically manipulating the AsH 3 (group-V) and TMGa (group-III) precursor flow rates, it is found that the TMGa flow rate has the most significant effect on the nanowire quality. After capping the minimal tapering and twin-free GaAs NWs with an AlGaAs shell, long exciton lifetimes (over 700ps) are obtained for high TMGa flow rate samples. It is observed that the Ga adatom concentration significantly affects the growth of GaAs NWs, with a high concentration and rapid growth leading to desirable characteristics for optoelectronic nanowire device applications including improved morphology, crystal structure and optical performance. © 2012 IOP Publishing Ltd.

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We report straight and vertically aligned defect-free GaAs nanowires grown on Si(111) substrates by metal-organic chemical vapor deposition. By deposition of thin GaAs buffer layers on Si substrates, these nanowires could be grown on the buffer layers with much less stringent conditions as otherwise imposed by epitaxy of III-V compounds on Si. Also, crystal-defect-free GaAs nanowires were grown by using either a two-temperature growth mode consisting of a short initial nucleation step under higher temperature followed by subsequent growth under lower temperature or a rapid growth rate mode with high source flow rate. These two growth modes not only eliminated planar crystallographic defects but also significantly reduced tapering. Core-shell GaAs-AlGaAs nanowires grown by the two-temperature growth mode showed improved optical properties with strong photoluminescence and long carrier life times. © 2011 American Chemical Society.

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Straight, vertically aligned GaAs nanowires were grown on Si(111) substrates coated with thin GaAs buffer layers. We find that the V/III precursor ratio and growth temperature are crucial factors influencing the morphology and quality of buffer layers. A double layer structure, consisting of a thin initial layer grown at low V/III ratio and low temperature followed by a layer grown at high V/III ratio and high temperature, is crucial for achieving straight, vertically aligned GaAs nanowires on Si(111) substrates. An in situ annealing step at high temperature after buffer layer growth improves the surface and structural properties of the buffer layer, which further improves the morphology of the GaAs nanowire growth. Through such optimizations we show that vertically aligned GaAs nanowires can be fabricated on Si(111) substrates and achieve the same structural and optical properties as GaAs nanowires grown directly on GaAs(111)B substrates.

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We investigate vertical and defect-free growth of GaAs nanowires on Si (111) substrates via a vapor-liquid-solid (VLS) growth mechanism with Au catalysts by metal-organic chemical vapor deposition (MOCVD). By using annealed thin GaAs buffer layers on the surface of Si substrates, most nanowires are grown on the substrates straight, following (111) direction; by using two temperature growth, the nanowires were grown free from structural defects, such as twin defects and stacking faults. Systematic experiments about buffer layers indicate that V/III ratio of precursor and growth temperature can affect the morphology and quality of the buffer layers. Especially, heterostructural buffer layers grown with different V/III ratios and temperatures and in-situ post-annealing step are very helpful to grow well arranged, vertical GaAs nanowires on Si substrates. The initial nanowires having some structural defects can be defect-free by two-temperature growth mode with improved optical property, which shows us positive possibility for optoelectronic device application. ©2010 IEEE.