Active-passive 44 SOA-based switch with integrated power monitoring

The first monolithically integrated 44 switch with power monitoring function using on-chip PIN photodiodes is reported. Using 10Gb/s signals, under active power control an IPDR of 12dB for a 1dB power penalty is achieved. © 2012 OSA.

A 4 GHz non-resonant clock driver with inductor-assisted energy return to power grid

Power consumption of a multi-GHz local clock driver is reduced by returning energy stored in the clock-tree load capacitance back to the on-chip power-distribution grid. We call this type of return energy recycling. To achieve a nearly square clock waveform, the energy is transferred in a non-resonant way using an on-chip inductor in a configuration resembling a full-bridge DC-DC converter. A zero-voltage switching technique is implemented in the clock driver to reduce dynamic power loss associated with the high switching frequencies. A prototype implemented in 90 nm CMOS shows a power savings of 35% at 4 GHz. The area needed for the inductor in this new clock driver is about 6% of a local clock region. © 2006 IEEE.

Asymmetric quantizers are better at low SNR

We study the behavior of channel capacity when a one-bit quantizer is employed at the output of the discrete-time average-power-limited Gaussian channel. We focus on the low signal-to-noise ratio regime, where communication at very low spectral efficiencies takes place, as in Spread-Spectrum and Ultra-Wideband communications. It is well known that, in this regime, a symmetric one-bit quantizer reduces capacity by 2/π, which translates to a power loss of approximately two decibels. Here we show that if an asymmetric one-bit quantizer is employed, and if asymmetric signal constellations are used, then these two decibels can be recovered in full. © 2011 IEEE.

Accelerator-induced transients in Accelerator Driven Subcritical Reactors

Achieving higher particles energies and beam powers have long been the main focus of research in accelerator technology. Since Accelerator Driven Subcritical Reactors (ADSRs) have become the subject of increasing interest, accelerator reliability and modes of operation have become important matters that require further research and development in order to accommodate the engineering and economic needs of ADSRs. This paper focuses on neutronic and thermo-mechanical analyses of accelerator-induced transients in an ADSR. Such transients fall into three main categories: beam interruptions (trips), pulsed-beam operation, and beam overpower. The concept of a multiple-target ADSR is shown to increase system reliability and to mitigate the negative effects of beam interruptions, such as thermal cyclic fatigue in the fuel cladding and the huge financial cost of total power loss. This work also demonstrates the effectiveness of the temperature-to-reactivity feedback mechanisms in ADSRs. A comparison of shutdown mechanisms using control rods and beam cut-off highlights the intrinsic safety features of ADSRs. It is evident that the presence of control rods is crucial in an industrial-scale ADSR. This paper also proposes a method to monitor core reactivity online using the repetitive pattern of beam current fluctuations in a pulsed-beam operation mode. Results were produced using PTS-ADS, a computer code developed specifically to study the dynamic neutronic and thermal responses to beam transients in subcritical reactor systems. © 2012 Elsevier B.V.

Predictive optimisation of high-power IGBT switching under Active Voltage Control

Active Voltage Control (AVC) is an implementation of classic Proportional-Derivative (PD) control and multi-loop feedback control to force IGBT to follow a pre-set switching trajectory. The initial objective of AVC was mainly to synchronise the switching of IGBTs connected in series so as to realise voltage balancing between devices. For a single IGBT switching, the AVC reference needs further optimisation. Thus, a predictive manner of AVC reference generation is required to cope with the nonlinear IGBT switching parameters while performing low loss switching. In this paper, an improved AVC structure is adopted along with a revised reference which accommodates the IGBT nonlinearity during switching and is predictive based on current being switched. Experimental and simulation results show that close control of a single IGBT switching is realised. It is concluded that good performance can be obtained, but the proposed method needs careful stability analysis for parameter choice. © 2013 IEEE.

Dead-time minimisation using active voltage control gate drive for high-power IGBT converters

High-power converters usually need longer dead-times than their lower-power counterparts and a lower switching frequency. Also due to the complicated assembly layout and severe variations in parasitics, in practice the conventional dead-time specific adjustment or compensation for high-power converters is less effective, and usually this process is time-consuming and bespoke. For general applications, minimising or eliminating dead-time in the gate drive technology is a desirable solution. With the growing acceptance of power electronics building blocks (PEBB) and intelligent power modules (IPM), gate drives with intelligent functions are in demand. Smart functions including dead time elimination/minimisation can improve modularity, flexibility and reliability. In this paper, a dead-time minimisation using Active Voltage Control (AVC) gate drive is presented. © 2012 IEEE.

Demonstration of cascaded operation of active-passive integrated 4×4 SOA switches with on-chip monitoring for power control and energy consumption optimization

Cascaded 4×4 SOA switches with on-chip power monitoring exhibit potential for lowpower 16×16 integrated switches. Cascaded operation at 10Gbit/s with an IPDR of 8.5dB and 79% lower power consumption than equivalent all-active switches is reported © 2013 OSA.