Analytical field-effect method for extraction of subgap states in thin-film transistors

We present an analytical field-effect method to extract the density of subgap states (subgap DOS) in amorphous semiconductor thin-film transistors (TFTs), using a closed-form relationship between surface potential and gate voltage. By accounting the interface states in the subthreshold characteristics, the subgap DOS is retrieved, leading to a reasonably accurate description of field-effect mobility and its gate voltage dependence. The method proposed here is very useful not only in extracting device performance but also in physically based compact TFT modeling for circuit simulation. © 2012 IEEE.

Investigation into IGBT dV/dt during turn-off and its temperature dependence

In many power converter applications, particularly those with high variable loads, such as traction and wind power, condition monitoring of the power semiconductor devices in the converter is considered desirable. Monitoring the device junction temperature in such converters is an essential part of this process. In this paper, a method for measuring the insulated gate bipolar transistor (IGBT) junction temperature using the collector voltage dV/dt at turn-OFF is outlined. A theoretical closed-form expression for the dV/dt at turn-OFF is derived, closely agreeing with experimental measurements. The role of dV/dt in dynamic avalanche in high-voltage IGBTs is also discussed. Finally, the implications of the temperature dependence of the dV/dt are discussed, including implementation of such a temperature measurement technique. © 2006 IEEE.

Modeling current-voltage behaviour in oxide TFTs combining trap-limited conduction with percolation

Current-voltage behaviour of oxide TFTs is modeled based on trap-limited conduction and percolation theories. The mobility has a power-law dependence, in which percolation controls the exponent while trap states determine constant term in the power law. The proposed model, which is fully physically-based, provides a good agreement with measured transistor characteristics as well as transient operations of fabricated pixel test circuits for oxide-based OLED displays. © 2013 Society for Information Display.

Switching performance of epitaxially grown normally-off 4H-SiC JFET

Static and dynamic behavior of the epitaxially grown dual gate trench 4H-SiC junction field effect transistor (JFET) is investigated. Typical on-state resistance Ron was 6-10mΩcm2 at VGS = 2.5V and the breakdown voltage between the range of 1.5-1.8kV was realized at VGS = -5V for normally-off like JFETs. It was found that the turn-on energy delivers the biggest part of the switching losses. The dependence of switching losses from gate resistor is nearly linear, suggesting that changing the gate resistor, a way similar to Si-IGBT technology, can easily control di/dt and dv/dt. Turn-on losses at 200°C are lower compared to those at 25°C, which indicates the influence of the high internal p-type gate layer resistance. Inductive switching numerical analysis suggested the strong influence of channel doping conditions on the turn-on switching performance. The fast switching normally-off JFET devices require heavily doped narrow JFET channel design. © (2009) Trans Tech Publications, Switzerland.

Evidence of quantum lateral confinement in side-gated resonant tunnelling diodes formed by patterned substrate regrowth

MBE regrowth on patterned np-GaAs wafers has been used to fabricate GaAs/AlGaAs double barrier resonant tunnel diodes with a side-gate in the plane of the quantum well. The physical diameters vary from 1 to 20 μm. For a nominally 1 μm diameter diode the peak current is reduced by more than 95% at a side-gate voltage of -2 V at 1.5 K, which we estimate corresponds to an active tunnel region diameter of 75 nm ± 10 nm. At high gate biases additional structure appears in the conductance data. Differential I-V measurements show a linear dependence of the spacing of subsidiary peaks on gate bias indicating lateral quantum confinement. © 1996 American Institute of Physics.

InGaN/GaN LEDs grown on Si(111): Dependence of device performance on threading dislocation density and emission wavelength

We demonstrate the growth of crack-free blue and greenemitting LED structures grown on 2-inch and 6-inch Si(111) substrates by metalorganic vapour phase epitaxy (MOVPE), using AlN nucleation layers and AlGaN buffer layers for stress management. LED device performance and its dependence on threading dislocation (TD) density and emission wavelength were studied. Despite the inherently low light extraction efficiency, an output power of 1.2 mW at 50 mA was measured from a 500 μm square planar device, emitting at 455 nm. The light output decreases dramatically as the emission wavelength increases from 455 nm to 510 nm. For LED devices emitting at similar wavelength, the light output was more than doubled when the TD density was reduced from 5×1 09 cm-2 to 2×109 cm-2. Our results clearly show that high TD density is detrimental to the overall light output, highlighting the need for further TD reduction for structures grown on Si. © 2010 Wiley-VCH Verlag GmbH & Co. KGaA.

The temperature dependence of effective thermal conductivity of open-celled steel alloy foams

The effective thermal conductivity of steel alloy FeCrAlY (Fe-20 wt.% Cr-5 wt.% Al-2 wt.% Y-20 wt.%) foams with a range of pore sizes and porosities was measured between 300 and 800 K, under both vacuum and atmospheric conditions. The results show that the effective thermal conductivity increases rapidly as temperature is increased, particularly in the higher temperature range (500-800 K) where the transport of heat is dominated by thermal radiation. The effective conductivity at temperature 800 K can be three times higher than that at room temperature (300 K). Results obtained under vacuum conditions reveal that the effective conductivity increases with increasing pore size or decreasing porosity. The contribution of natural convection to heat conduction was found to be significant, with the effective thermal conductivity at ambient pressure twice the value of vacuum condition. The results also show that natural convection in metal foams is strongly dependent upon porosity. © 2003 Elsevier B.V. All rights reserved.

Semi-insulating layer for novel high voltage polysilicon thin film transistors

This work describes the deposition and characterisation of semi-insulating oxygen-doped silicon films for the development of high voltage polycrystalline silicon (poly-Si) circuitry on glass. The performance of a novel poly-Si High Voltage Thin Film Transistor (HVTFT) structure, incorporating a layer of semi-insulating material, has been investigated using a two dimensional device simulator. The semi-insulating layer increases the operating voltage of the HVTFT structure by linearising the potential distribution in the device offset region. A glass compatible semi-insulating layer, suitable for HVTFT applications, has been deposited by the Plasma Enhanced Chemical Vapour Deposition (PECVD) technique from silane (SiH4), nitrous oxide (N2O) and helium (He) gas mixtures. The as-deposited films are furnace annealed at 600°C which is the maximum process temperature. By varying the N2O/SiH4 ratio the conductivity of the annealed films can be accurately controlled up to a maximum of around 10-7 Ω-1cm-1. Helium dilution of the reactant gases improves both film uniformity and reproducibility. Raman analysis shows the as-deposited and annealed films to be completely amorphous. A model for the microstructure of these Semi-Insulating Amorphous Oxygen-Doped Silicon (SIAOS) films is proposed to explain the observed physical and electrical properties.