IGBT series connection under Active Voltage Control with temporary clamp

This paper presents the use of an Active Voltage Control (AVC) technique for balancing the voltages in a series connection of Insulated Gate Bipolar Transistors (IGBTs). The AVC technique can control the switching trajectory of an IGBT according to a pre-set reference signal. In series connections, every series connected IGBT follows the reference and so that the dynamic voltage sharing is achieved. For the static voltage balancing, a temporary clamp technique is introduced. The temporary clamp technique clamps the collector-emitter voltage of all the series connected IGBTs at the ideal voltage so that the IGBTs will share the voltage evenly. © 2012 IEEE.

IGBT series connection under active voltage control

In this paper an Active Voltage Control (AVC) technique is presented, for series connection of insulated-gate-bipolar-transistors (IGBT) and control of diode recovery. The AVC technique can control the switching trajectory of an IGBT according to a pre-set reference signal. In series connections, every series connected IGBT follows the reference and so that the dynamic voltage sharing is achieved. For the static voltage balancing, the AVC technique can clamp the highest collector-to-emitter voltage to a pre-set clamping voltage level. By selecting the value of the clamping voltage, the difference among series connected IGBTs can be controlled in an accepted range. Another key advantage for AVC is that by changing the reference signal at turn-on, the diode recovery can be optimized. © 2011 EPE Association - European Power Electr.

Semi-insulating layer for novel high voltage polysilicon thin film transistors

This work describes the deposition and characterisation of semi-insulating oxygen-doped silicon films for the development of high voltage polycrystalline silicon (poly-Si) circuitry on glass. The performance of a novel poly-Si High Voltage Thin Film Transistor (HVTFT) structure, incorporating a layer of semi-insulating material, has been investigated using a two dimensional device simulator. The semi-insulating layer increases the operating voltage of the HVTFT structure by linearising the potential distribution in the device offset region. A glass compatible semi-insulating layer, suitable for HVTFT applications, has been deposited by the Plasma Enhanced Chemical Vapour Deposition (PECVD) technique from silane (SiH4), nitrous oxide (N2O) and helium (He) gas mixtures. The as-deposited films are furnace annealed at 600°C which is the maximum process temperature. By varying the N2O/SiH4 ratio the conductivity of the annealed films can be accurately controlled up to a maximum of around 10-7 Ω-1cm-1. Helium dilution of the reactant gases improves both film uniformity and reproducibility. Raman analysis shows the as-deposited and annealed films to be completely amorphous. A model for the microstructure of these Semi-Insulating Amorphous Oxygen-Doped Silicon (SIAOS) films is proposed to explain the observed physical and electrical properties.

Instability in threshold voltage and subthreshold behavior in Hf-In-Zn-O thin film transistors induced by bias-and light-stress

Electrical bias and light stressing followed by natural recovery of amorphous hafnium-indium-zinc-oxide (HIZO) thin film transistors with a silicon oxide/nitride dielectric stack reveals defect density changes, charge trapping and persistent photoconductivity (PPC). In the absence of light, the polarity of bias stress controls the magnitude and direction of the threshold voltage shift (Δ VT), while under light stress, VT consistently shifts negatively. In all cases, there was no significant change in field-effect mobility. Light stress gives rise to a PPC with wavelength-dependent recovery on time scale of days. We observe that the PPC becomes more pronounced at shorter wavelengths. © 2010 American Institute of Physics.