Post-processing of vertical-cavity surface-emitting lasers for transverse mode and polarization control

The operation on how high quality single-mode operation can be readily attained on etching circles in multimode devices is discussed. Arrays of such spots can also be envisaged. Control of the polarization state is also achieved by use of deep line etches. The output filaments and beam shapes of the conventional multimode vertical cavity surface emitting lasers (VCSEL) is shown to be engineered in terms of their positions, widths, and polarizations by use of focused ion beam etching (FIBE). Several GaAs quantum well top-emitting devices with cavity diameters of 10 μm and 18 μm were investigated.

Microfluidics based on ZnO/nanocrystalline diamond surface acoustic wave devices.

Surface acoustic wave (SAW) devices with 64 μm wavelength were fabricated on a zinc oxide (ZnO) film deposited on top of an ultra-smooth nanocrystalline diamond (UNCD) layer. The smooth surface of the UNCD film allowed the growth of the ZnO film with excellent c-axis orientation and low surface roughness, suitable for SAW fabrication, and could restrain the wave from significantly dissipating into the substrate. The frequency response of the fabricated devices was characterized and a Rayleigh mode was observed at ∼65.4 MHz. This mode was utilised to demonstrate that the ZnO/UNCD SAW device can be successfully used for microfluidic applications. Streaming, pumping, and jetting using microdroplets of 0.5 and 20 μl were achieved and characterized under different powers applied to the SAW device, focusing more on the jetting behaviors induced by the ZnO SAW.

Ultrashort pulse generation in diode laser devices

The generation of ultrashort optical pulses by semiconductor lasers has been extensively studied for many years. A number of methods, including gain-/Q-switching and different types of mode locking, have been exploited for the generation of picosecond and sub-picosecond pulses [1]. However, the shortest pulses produced by diode lasers are still much longer and weaker than those that are generated by advanced mode-locked solid-state laser systems [2]. On the other hand, an interesting class of devices based on superradiant emission from multiple contact diode laser structures has also been recently reported [3]. Superradiance (SR) is a transient quantum optics phenomenon based on the cooperative radiative recombination of a large number of oscillators, including atoms, molecules, e-h pairs, etc. SR in semiconductors can be used for the study of fundamental properties of e-h ensembles such as photon-mediated pairing, non-equilibrium e-h condensation, BSC-like coherent states and related phenomena. Due to the intrinsic parameters of semiconductor media, SR emission typically results in the generation of a high-power optical pulse or pulse train, where the pulse duration can be much less than 1 ps, under optimised bias conditions. Advantages of this technique over mode locking in semiconductor laser structures include potentially shorter pulsewidths and much larger peak powers. Moreover, the pulse repetition rate of mode-locked pulses is fixed by the cavity round trip time, whereas the repetition rate of SR pulses is controlled by the current bias and can be varied over a wide range. © 2012 IEEE.

SuperJunction IGBTS: An evolutionary step of silicon power devices with high impact potential

15 years ago the vertical SuperJunction (SJ) concept conceived for SJ power MOSFETs was the last, major breakthrough in the field of silicon power devices. Today, the SuperJunction MOSFET technologies have reached a mature stage characterized by gradual performance improvements. SuperJunction Insulated Gate Bipolar Transistors (SJ IGBTs) could interrupt this stagnation holding promise to revitalize voltage classes from 600 up to 1200 V. Such SJ IGBTs surpass by a very significant margin their SJ MOSFET counterparts both in terms of power handling capability, on-state and turn-off losses, all at the same time. On the higher end of the voltage class, SJ IGBTs would top the performance of 1.2 kV IGBTs by a similar margin. © 2012 IEEE.

Three dimensional distributions of arsenic and platinum within NiSi contact and gate of an n-type transistor

Atom probe tomography was used to study the redistribution of platinum and arsenic atoms after Ni(Pt) silicidation of As-doped polycrystalline Si. These measurements were performed on a field-effect transistor and compared with those obtained in unpatterned region submitted to the same process. These results suggest that Pt and As redistribution during silicide formation is only marginally influenced by the confinement in microelectronic devices. On the contrary, there is a clear difference with the redistribution reported in the literature for the blanket wafers. Selective etching used to remove the non-reacted Ni(Pt) film after the first rapid heat treatment may induce this difference. © 2011 American Institute of Physics.

Cryogenic on-chip multiplexer for the study of quantum transport in 256 split-gate devices

We present a multiplexing scheme for the measurement of large numbers of mesoscopic devices in cryogenic systems. The multiplexer is used to contact an array of 256 split gates on a GaAs/AlGaAs heterostructure, in which each split gate can be measured individually. The low-temperature conductance of split-gate devices is governed by quantum mechanics, leading to the appearance of conductance plateaux at intervals of 2e^2/h. A fabrication-limited yield of 94% is achieved for the array, and a "quantum yield" is also defined, to account for disorder affecting the quantum behaviour of the devices. The quantum yield rose from 55% to 86% after illuminating the sample, explained by the corresponding increase in carrier density and mobility of the two-dimensional electron gas. The multiplexer is a scalable architecture, and can be extended to other forms of mesoscopic devices. It overcomes previous limits on the number of devices that can be fabricated on a single chip due to the number of electrical contacts available, without the need to alter existing experimental set ups.

Top down scale-up of semiconducting nanostructures for large area electronics

In this paper, we present a study on electrical and optical characteristics of n-type tin-oxide nanowires integrated based on top-down scale-up strategy. Through a combination of contact printing and plasma based back-channel passivation, we have achieved stable electrical characteristics with standard deviation in mobility and threshold voltage of 9.1% and 25%, respectively, for a large area of 1× 1 cm2 area. Through use of contact printing, high alignment of nanowires was achieved thus minimizing the number of nanowire-nanowire junctions, which serve to limit carrier transport in the channel. In addition, persistent photoconductivity has been observed, which we attribute to oxygen vacancy ionization and subsequent elimination using a gate pulse driving scheme. © 2014 IEEE.

Ni(Pt)-silicide contacts on CMOS devices: Impact of substrate nature and Pt concentration on the phase formation

Ni silicides used as contacts in source/drain and gate of advanced CMOS devices were analyzed by atom probe tomography (APT) at atomic scale. These measurements were performed on 45 nm nMOS after standard self-aligned silicide (salicide) process using Ni(5 at.% Pt) alloy. After the first annealing (RTA1), δ-Ni2Si was the only phase formed on gate and source/drain while, after the second annealing (RTA2), two different Ni silicides have been formed: NiSi on the gate and δ-Ni2Si on the source and drain. This difference between source/drain and gate regions in nMOS devices has been related to the Si substrate nature (poly or mono-crystalline) and to the size of the contact. In fact, NiSi seems to have difficulties to nucleate in the narrow source/drain contact on mono-crystalline Si. The results have been compared to analysis performed on 28 nm nMOS where the Pt concentration is higher (10 at.% Pt). In this case, θ-Ni2Si is the first phase to form after RTA1 and NiSi is then formed at the same time on source (or drain) and gate after RTA2. The absence of the formation of NiSi from δ-Ni 2Si/Si(1 0 0) interface compared to θ-Ni2Si/Si(1 0 0) interface could be related to the difference of the interface energies. The redistributions of As and Pt in different silicides and interfaces were measured and discussed. In particular, it has been evidenced that Pt redistributions obtained on both 45 and 28 nm MOS transistors correspond to respective Pt distributions measured on blanket wafers. © 2013 Elsevier B.V. All rights reserved.