45 resultados para Thin cell layer

em Cambridge University Engineering Department Publications Database


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An improved technique for transferring large area graphene grown by chemical vapor deposition on copper is presented. It is based on mechanical separation of the graphene/copper by H2 bubbles during H2O electrolysis, which only takes a few tens of seconds while leaving the copper cathode intact. A semi-rigid plastic frame in combination with thin polymer layer span on graphene gives a convenient way of handling- and avoiding wrinkles and holes in graphene. Optical and electrical characterizations prove the graphene quality is better than that obtained by traditional wet etching transfer. This technique appears to be highly reproducible and cost efficient. © 2013 American Institute of Physics.

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In this study, we investigated non-ideal characteristics of a diamond Schottky barrier diode with Molybdenum (Mo) Schottky metal fabricated by Microwave Plasma Chemical Vapour Deposition (MPCVD) technique. Extraction from forward bias I-V and reverse bias C- 2-V measurements yields ideality factor of 1.3, Schottky barrier height of 1.872 eV, and on-resistance of 32.63 mö·cm2. The deviation of extracted Schottky barrier height from an ideal value of 2.24 eV (considering Mo workfunction of 4.53 eV) indicates Fermi level pinning at the interface. We attributed such non-ideal behavior to the existence of thin interfacial layer and interface states between metal and diamond which forms Metal-Interfacial layer-Semiconductor (MIS) structure. Oxygen surface treatment during fabrication process might have induced them. From forward bias C-V characteristics, the minimum thickness of the interfacial layer is approximately 0.248 nm. Energy distribution profile of the interface state density is then evaluated from the forward bias I-V characteristics based on the MIS model. The interface state density is found to be uniformly distributed with values around 1013 eV - 1·cm- 2. © 2013 Elsevier B.V.

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Straight, vertically aligned GaAs nanowires were grown on Si(111) substrates coated with thin GaAs buffer layers. We find that the V/III precursor ratio and growth temperature are crucial factors influencing the morphology and quality of buffer layers. A double layer structure, consisting of a thin initial layer grown at low V/III ratio and low temperature followed by a layer grown at high V/III ratio and high temperature, is crucial for achieving straight, vertically aligned GaAs nanowires on Si(111) substrates. An in situ annealing step at high temperature after buffer layer growth improves the surface and structural properties of the buffer layer, which further improves the morphology of the GaAs nanowire growth. Through such optimizations we show that vertically aligned GaAs nanowires can be fabricated on Si(111) substrates and achieve the same structural and optical properties as GaAs nanowires grown directly on GaAs(111)B substrates.

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CW and time-resolved photoluminescence measurements are used to investigate exciton recombination dynamics in GaAsAlGaAs heterostructure nanowires grown with a recently developed technique which minimizes twinning. A thin capping layer is deposited to eliminate the possibility of oxidation of the AlGaAs shell as a source of oxygen defects in the GaAs core. We observe exciton lifetimes of ∼1 ns, comparable to high quality two-dimensional double heterostructures. These GaAs nanowires allow one to observe state filling and many-body effects resulting from the increased carrier densities accessible with pulsed laser excitation. © 2008 American Institute of Physics.

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We experimentally demonstrate a high-Q ultrathin silicon nitride microring resonator operating at wavelength of 970 nm that is favorable for large variety of biophotonic applications. Implementation of thin device layer of 200 nm allows enhanced interaction between the optical mode and environment, while still maintaining high quality factor of resonator. In addition, we show the importance of spectral window around 970 nm to improve device sensing capability. © 2010 American Institute of Physics.

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A compact microwave phase shifter was designed and fabricated using highly anisotropic liquid crystals (LCs). It comprises a thin LC layer between a ground plane and a directly coupled and inverted microstrip line. The proposed folding configuration is beneficial for size reduction. Both simulation and experimental results confirm the compact size devices with reasonably good performance.

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This work describes the deposition and characterisation of semi-insulating oxygen-doped silicon films for the development of high voltage polycrystalline silicon (poly-Si) circuitry on glass. The performance of a novel poly-Si High Voltage Thin Film Transistor (HVTFT) structure, incorporating a layer of semi-insulating material, has been investigated using a two dimensional device simulator. The semi-insulating layer increases the operating voltage of the HVTFT structure by linearising the potential distribution in the device offset region. A glass compatible semi-insulating layer, suitable for HVTFT applications, has been deposited by the Plasma Enhanced Chemical Vapour Deposition (PECVD) technique from silane (SiH4), nitrous oxide (N2O) and helium (He) gas mixtures. The as-deposited films are furnace annealed at 600°C which is the maximum process temperature. By varying the N2O/SiH4 ratio the conductivity of the annealed films can be accurately controlled up to a maximum of around 10-7 Ω-1cm-1. Helium dilution of the reactant gases improves both film uniformity and reproducibility. Raman analysis shows the as-deposited and annealed films to be completely amorphous. A model for the microstructure of these Semi-Insulating Amorphous Oxygen-Doped Silicon (SIAOS) films is proposed to explain the observed physical and electrical properties.