57 resultados para Side Slopes.

em Cambridge University Engineering Department Publications Database


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A newly developed computer model, which solves the horizontal two-dimensional Boussinesq equations using a total variation diminishing Lax-Wendroff scheme, has been used to study the runup of solitary waves, with various heights, on idealized conical islands consisting of side slopes of different angles. This numerical model has first been validated against high-quality laboratory measurements of solitary wave runups on a uniform plane slope and on an isoliated conical island, with satisfactory agreement being achieved. An extensive parametric study concerning the effects of the wave height and island slope on the solitary wave runup has subsequently been carried out. Strong wave shoaling and diffraction effects have been observed for all the cases investigated. The relationship between the runup height and wave height has been obtained and compared with that for the case on uniform plane slopes. It has been found that the runup on a conical island is generally lower than that on a uniform plane slope, as a result of the two-dimensional effect. The correlation between the runup with the side slope of an island has also been identified, with higher runups on milder slopes. This comprehensive study on the soliton runup on islands is relevant to the protection of coastal and inland regions from extreme wave attacks. © the Coastal Education & Research Foundation 2012.

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MBE regrowth on patterned np-GaAs wafers has been used to fabricate GaAs/AlGaAs double barrier resonant tunnel diodes with a side-gate in the plane of the quantum well. The physical diameters vary from 1 to 20 μm. For a nominally 1 μm diameter diode the peak current is reduced by more than 95% at a side-gate voltage of -2 V at 1.5 K, which we estimate corresponds to an active tunnel region diameter of 75 nm ± 10 nm. At high gate biases additional structure appears in the conductance data. Differential I-V measurements show a linear dependence of the spacing of subsidiary peaks on gate bias indicating lateral quantum confinement. © 1996 American Institute of Physics.

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In this paper a novel approach to the design and fabrication of a high temperature inverter module for hybrid electrical vehicles is presented. Firstly, SiC power electronic devices are considered in place of the conventional Si devices. Use of SiC raises the maximum practical operating junction temperature to well over 200°C, giving much greater thermal headroom between the chips and the coolant. In the first fabrication, a SiC Schottky barrier diode (SBD) replaces the Si pin diode and is paired with a Si-IGBT. Secondly, double-sided cooling is employed, in which the semiconductor chips are sandwiched between two substrate tiles. The tiles provide electrical connections to the top and the bottom of the chips, thus replacing the conventional wire bonded interconnect. Each tile assembly supports two IGBTs and two SBDs in a half-bridge configuration. Both sides of the assembly are cooled directly using a high-performance liquid impingement system. Specific features of the design ensure that thermo-mechanical stresses are controlled so as to achieve long thermal cycling life. A prototype 10 kW inverter module is described incorporating three half-bridge sandwich assemblies, gate drives, dc-link capacitance and two heat-exchangers. This achieves a volumetric power density of 30W/cm3.

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We have fabricated self-aligned, side-gated suspended multi-walled carbon nanotubes (MWCNTs), with nanotube-to-gate spacing of less than 10 nm. Evaporated metal forms an island on a suspended MWCNT, the island and the nanotube act as a mask shielding the substrate, and lift-off then removes the metal island, leaving a set of self-aligned side gates. Al, Cr, Au, and Ti were investigated and the best results were obtained with Cr, at a yield of over 90%.

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