106 resultados para Power ratings
em Cambridge University Engineering Department Publications Database
Resumo:
MOS gated power devices are now available for power switching applications with voltage blocking requirements up to 1 kV and current ratings up to 300A. This is due to the invention of the IGBT, a device in which MOS gate turn-on leads to minority carrier injection to modulate the high resistance drift region required for voltage blocking. The paper presents current technologies being developed in order to expand the applications of MOS gated power devices. Also explained is the available trench gate technology that can be used to fabricate power devices.
Resumo:
This paper discusses the inverter ratings of Brushless Doubly-Fed Machine (BDFM) adjustable speed drive (ASD) or generator (ASG) systems. Based on the per phase equivalent circuit model, the ratings of the two inverters in a bidirectional converter are evaluated individually. An approach to minimise the total inverter rating is presented, taking into account power factor constraints of the power grid. The effects of speed deviation and control winding excitation on the inverter ratings are discussed. Predictions of inverter ratings are presented with experimental verification. A design example is also provided in which the total inverter rating is minimised for a practical BDFM based ASG system. © 2005 IEEE.
Resumo:
In this paper, micro gas sensor was fabricated using indium oxide nanowire for effective gas detection and monitoring system. Indium oxide nanowire was grown using thermal CVD, and their structural properties were examined by the SEM, XRD and TEM. The electric properties for microdropped indium oxide nanowire device were measured, and gas response characteristics were examined for CO gas. Sensors showed high sensitivity and stability for CO gas. And with below 20 mw power consumption, 5 ppm CO could be detected.
Resumo:
A power LDMOS on partial silicon on insulator (PSOI) with a variable low-κ dielectric (VLKD) buried layer and a buried p (BP) layer is proposed (VLKD BPSOI). At a low κ value, the electric field strength in the buried dielectric (EI) is enhanced, and a Si window makes the substrate share the vertical voltage drop, leading to a high vertical breakdown voltage (BV). Moreover, three interface field peaks are introduced by the BP, the Si window, and the VLKD, which modulate the fields in the SOI layer, the VLKD layer, and the substrate; consequently, a high BV is obtained. Furthermore, the BP reduces the specific on-resistance (Ron), and the Si window alleviates the self-heating effect (SHE). The BV for VLKD BPSOI is enhanced by 34.5%, and Ron is decreased by 26.6%, compared with those for the conventional PSOI, and VLKD BPSOI also maintains a low SHE. © 2006 IEEE.
Resumo:
This work describes the deposition, annealing and characterisation of semi-insulating oxygen-doped silicon films at temperatures compatible with polysilicon circuitry on glass. The semi-insulating layers are deposited by the plasma enhanced chemical vapour deposition technique from silane (SiH4), nitrous oxide (N2O) and helium (He) gas mixtures at a temperature of 350 °C. The as-deposited films are then furnace annealed at 600 °C which is the maximum process temperature. Raman analysis shows the as-deposited and annealed films to be completely amorphous. The most important deposition variable is the N2O SiH4 gas ratio. By varying the N2O SiH4 ratio the conductivity of the annealed films can be accurately controlled, for the first time, down to a minimum of ≈10-7Ω-1cm-1 where they exhibit a T -1 4 temperature dependence indicative of a hopping conduction mechanism. Helium dilution of the reactant gases is shown to improve both film uniformity and reproducibility. A model for the microstructure of these semi-insulating amorphous oxygen-doped silicon films is proposed to explain the observed physical and electrical properties. © 1995.