Evaluation of termination techniques for 4H-SiC PiN diodes and trench JFETs

An investigation concerning suitable termination techniques for 4H-SiC trench JFETs is presented. Field plates, p+ floating rings and junction termination extension techniques are used to terminate 1.2kV class PiN diodes. The fabricated PiN diodes evaluated here have a similar design to trench JFETs. Therefore, the conclusions for PiN diodes can be applied to JFET structures as well. Numerical simulations are also used to illustrate the effect of the terminations on the diodes' blocking mode behaviour.

Physical modelling of large area 4H-SiC PiN diodes

The recent developments in SiC PiN diode research mean that physics-based models that allow accurate, rapid prediction of switching and conduction performance and resulting converter losses will soon be required. This is especially the case given the potential for very high voltage converters to be used for enabling distributed and renewable power generation. In this work an electro-thermal compact model of a 4.5 kV silicon carbide PiN diode has been developed for converter loss modelling in Simulink. Good matching of reverse recovery has been achieved between 25 and 200 °C. The I-V characteristics of the P+ anode contact have been shown to be significant in obtaining good matching for the forward characteristics of the diode, requiring further modelling work in this area. © 2009 IEEE.

Local lifetime engineering in 600V pin diode using mix-mode simulation

This paper reports a detailed analysis of the effect of local lifetime killing (LLK) within the drift region on the reverse recovery (RR) characteristics and on-state performance of 600V Silicon PiN diodes. The paper also discusses the influence of the measurement circuit on the reverse recovery of the high voltage diodes and it proposes a simple and effective mix-mode simulation tool for an accurate assessment of the diode performance in reverse recovery mode. © 2013 IEEE.

A fast 600-V Tandem PiN Schottky (TPS) rectifier with ultra-low on-state voltage

The Tandem PiN Schottky (TPS) rectifier features lowly-doped p-layers in both active and termination regions, and is applied in 600-V rating for the first time. In the active region, the Schottky contact is in series connection with a transparent p-layer, leading to a superior forward performance than the conventional diodes. In addition, due to the benefit of moderate hole injection from the p-layer, the TPS offers a better trade-off between the on-state voltage and the switching speed. The active p-layer also helps to stabilise the Schottky contact, and hence the electrical data distributions are more concentrated. Regarding the floating p-layer in the termination region, its purpose is to reduce the peak electric fields, and the TPS demonstrates a high breakdown voltage with a compact termination width, less than 70% of the state-of-the-art devices on the market. Experimental results have shown that the 600-V TPS rectifier has an ultra-low on-state voltage of 0.98 V at 250 A/cm 2, a fast turn-off time of 75 ns by the standard RG1 test (I F=0.5A, I R=1A, and I RR=0.25A) and a breakdown voltage over 720 V. It is noteworthy that the p-layers in the active and termination regions can be formed at no extra cost for the use of self-alignment process. © 2012 IEEE.

Evidence of quantum lateral confinement in side-gated resonant tunnelling diodes formed by patterned substrate regrowth

MBE regrowth on patterned np-GaAs wafers has been used to fabricate GaAs/AlGaAs double barrier resonant tunnel diodes with a side-gate in the plane of the quantum well. The physical diameters vary from 1 to 20 μm. For a nominally 1 μm diameter diode the peak current is reduced by more than 95% at a side-gate voltage of -2 V at 1.5 K, which we estimate corresponds to an active tunnel region diameter of 75 nm ± 10 nm. At high gate biases additional structure appears in the conductance data. Differential I-V measurements show a linear dependence of the spacing of subsidiary peaks on gate bias indicating lateral quantum confinement. © 1996 American Institute of Physics.

Using internal fibre geometry to improve the performance of pin-loaded holes in composite materials

The anisotropic nature of fibre reinforced composites leads to large stress concentrations around pin-loaded holes through standard weave cloths. Proper understanding of how this anisotropic nature affects the load distribution around holes can be utilised to reduce these con-centrations if sufficient thought is given to the internal fibre geometry near to the hole. Such local reinforcements need not be highly complex and can be readily produced without excessive effort, producing significant improvements in performance. © 1996 Kluwer Academic Publishers.