Zinc oxide nanostructures and high electron mobility nanocomposite thin film transistors

This paper reports on the synthesis of zinc oxide (ZnO) nanostructures and examines the performance of nanocomposite thin-film transistors (TFTs) fabricated using ZnO dispersed in both n- and p-type polymer host matrices. The ZnO nanostructures considered here comprise nanowires and tetrapods and were synthesized using vapor phase deposition techniques involving the carbothermal reduction of solid-phase zinc-containing compounds. Measurement results of nanocomposite TFTs based on dispersion of ZnO nanorods in an n-type organic semiconductor ([6, 6]-phenyl-C61-butyric acid methyl ester) show electron field-effect mobilities in the range 0.3-0.6 cm2V-1 s-1. representing an approximate enhancement by as much as a factor of 40 from the pristine state. The on/off current ratio of the nanocomposite TFTs approach 106 at saturation with off-currents on the order of 10 pA. The results presented here, although preliminary, show a highly promising enhancement for realization of high-performance solution-processable n-type organic TFTs. © 2008 IEEE.

How to achieve high mobility thin film transistors by direct deposition of silicon using 13.56 MHz RF PECVD?

CMOS nanocrystalline silicon thin film transistors with high field effect mobility are reported. The transistors were directly deposited by radio-frequency plasma enhanced chemical vapor deposition at 150°C The transistors show maximum field effect mobility of 450 cm2/V-s for electrons and 100 cm2/V-s for holes at room temperature. We attribute the high mobilities to a reduction of the oxygen content, which acts as an accidental donor. Indeed, secondary ion mass spectrometry measurements show that the impurity concentration in the nanocrystalline Si layer is comparable to, or lower than, the defect density in the material, which is already low thanks to hydrogen passivation.

High mobility N-channel and P-channel nanocrystalline silicon thin-film transistors

We report high hole and electron mobilities in nanocrystalline silicon (nc-Si:H) top-gate staggered thin-film transistors (TFTs) fabricated by direct plasma-enhanced chemical vapor deposition (PECVD) at 260°C. The n-channel nc-Si:H TFT with n+ nc-Si:H ohmic contacts shows a field-effect electron mobility (μnFE) of 130 cm2/Vs, which increases to 150 cm2/Vs with Cr-silicide contacts, along with a field-effect hole mobility (μhFE) of 25 cm2/Vs. To the best of our knowledge, the hole and electron mobilities reported here are the highest achieved to date using direct PECVD. © 2005 IEEE.

Inkjet-printed graphene electronics.

We demonstrate inkjet printing as a viable method for large-area fabrication of graphene devices. We produce a graphene-based ink by liquid phase exfoliation of graphite in N-methylpyrrolidone. We use it to print thin-film transistors, with mobilities up to ∼95 cm(2) V(-1) s(-1), as well as transparent and conductive patterns, with ∼80% transmittance and ∼30 kΩ/□ sheet resistance. This paves the way to all-printed, flexible, and transparent graphene devices on arbitrary substrates.

Low partial pressure chemical vapor deposition of graphene on copper

A systematic study of the Cu-catalyzed chemical vapor deposition of graphene under extremely low partial pressure is carried out. A carbon precursor supply of just P CH4∼ 0.009 mbar during the deposition favors the formation of large-area uniform monolayer graphene verified by Raman spectra. A diluted HNO 3 solution is used to remove Cu before transferring graphene onto SiO 2/Si substrates or carbon grids. The graphene can be made suspended over a ∼12 μm distance, indicating its good mechanical properties. Electron transport measurements show the graphene sheet resistance of ∼0.6 kΩ/□ at zero gate voltage. The mobilities of electrons and holes are ∼1800 cm 2/Vs at 4.2 K and ∼1200 cm 2/Vs at room temperature. © 2011 IEEE.

Kinetic control of catalytic CVD for high-quality graphene at low temperatures.

Low-temperature (∼600 °C), scalable chemical vapor deposition of high-quality, uniform monolayer graphene is demonstrated with a mapped Raman 2D/G ratio of >3.2, D/G ratio ≤0.08, and carrier mobilities of ≥3000 cm(2) V(-1) s(-1) on SiO(2) support. A kinetic growth model for graphene CVD based on flux balances is established, which is well supported by a systematic study of Ni-based polycrystalline catalysts. A finite carbon solubility of the catalyst is thereby a key advantage, as it allows the catalyst bulk to act as a mediating carbon sink while optimized graphene growth occurs by only locally saturating the catalyst surface with carbon. This also enables a route to the controlled formation of Bernal stacked bi- and few-layered graphene. The model is relevant to all catalyst materials and can readily serve as a general process rationale for optimized graphene CVD.

Electronic properties of GaAs, InAs and InP nanowires studied by terahertz spectroscopy.

We have performed a comparative study of ultrafast charge carrier dynamics in a range of III-V nanowires using optical pump-terahertz probe spectroscopy. This versatile technique allows measurement of important parameters for device applications, including carrier lifetimes, surface recombination velocities, carrier mobilities and donor doping levels. GaAs, InAs and InP nanowires of varying diameters were measured. For all samples, the electronic response was dominated by a pronounced surface plasmon mode. Of the three nanowire materials, InAs nanowires exhibited the highest electron mobilities of 6000 cm² V⁻¹ s⁻¹, which highlights their potential for high mobility applications, such as field effect transistors. InP nanowires exhibited the longest carrier lifetimes and the lowest surface recombination velocity of 170 cm s⁻¹. This very low surface recombination velocity makes InP nanowires suitable for applications where carrier lifetime is crucial, such as in photovoltaics. In contrast, the carrier lifetimes in GaAs nanowires were extremely short, of the order of picoseconds, due to the high surface recombination velocity, which was measured as 5.4 × 10⁵ cm s⁻¹. These findings will assist in the choice of nanowires for different applications, and identify the challenges in producing nanowires suitable for future electronic and optoelectronic devices.

All-chemical vapor deposited graphene/silicon nitride TFTs

All-chemical vapor deposited silicon nitride / monolayer graphene TFTs have been fabricated. Polychromatic Raman spectroscopy shows high quality monolayer graphene channels with uniform coverage and significant interfacial doping at the source-drain contacts. Nominal mobilities of approximately 1900 cm 2V-1s-1 have been measured opening up a potentially useful platform for analogue and RFR-based applications fabricated through allchemical vapor deposition processes. © The Electrochemical Society.

Probing the critical electronic properties of III-V nanowires using optical pump-terahertz probe spectroscopy

Optical pump-terahertz probe spectroscopy was used to study the key electronic properties of GaAs, InAs and InP nanowires at room temperature. Of all nanowires studied, InAs nanowires exhibited the highest mobilities of 6000 cm2V-1s-1. InP nanowires featured the longest photoconductivity lifetimes and an exceptionally low surface recombination velocity of 170 cm/s. © 2013 IEEE.

Measuring the electrical properties of semiconductor nanowires using terahertz conductivity spectroscopy

Accurately measuring the electronic properties of nanowires is a crucial step in the development of novel semiconductor nanowire-based devices. With this in mind, optical pump-terahertz probe (OPTP) spectroscopy is ideally suited to studies of nanowires: it provides non-contact measurement of carrier transport and dynamics at room temperature. OPTP spectroscopy has been used to assess key electrical properties, including carrier lifetime and carrier mobility, of GaAs, InAs and InP nanowires. The measurements revealed that InAs nanowires exhibited the highest mobilities and InP nanowires exhibited the lowest surface recombination velocity. © 2013 Copyright SPIE.

Graphene nanoribbon blends with P3HT for organic electronics.

In organic field-effect transistors (OFETs) the electrical characteristics of polymeric semiconducting materials suffer from the presence of structural/morphological defects and grain boundaries as well as amorphous domains within the film, hindering an efficient transport of charges. To improve the percolation of charges we blend a regioregular poly(3-hexylthiophene) (P3HT) with newly designed N = 18 armchair graphene nanoribbons (GNRs). The latter, prepared by a bottom-up solution synthesis, are expected to form solid aggregates which cannot be easily interfaced with metallic electrodes, limiting charge injection at metal-semiconductor interfaces, and are characterized by a finite size, thus by grain boundaries, which negatively affect the charge transport within the film. Both P3HT and GNRs are soluble/dispersible in organic solvents, enabling the use of a single step co-deposition process. The resulting OFETs show a three-fold increase in the charge carrier mobilities in blend films, when compared to pure P3HT devices. This behavior can be ascribed to GNRs, and aggregates thereof, facilitating the transport of the charges within the conduction channel by connecting the domains of the semiconductor film. The electronic characteristics of the devices such as the Ion/Ioff ratio are not affected by the addition of GNRs at different loads. Studies of the electrical characteristics under illumination for potential use of our blend films as organic phototransistors (OPTs) reveal a tunable photoresponse. Therefore, our strategy offers a new method towards the enhancement of the performance of OFETs, and holds potential for technological applications in (opto)electronics.

High performance transistors based on the controlled growth of triisopropylsilylethynyl-pentacene crystals via non-isotropic solvent evaporation

Triisopropylsilylethynyl-pentacene (TIPS-PEN) has proven to be one of the most promising small molecules in the field of molecular electronics, due to its unique features in terms of stability, performance and ease of processing. Among a wide variety of well-established techniques for the deposition of TIPS-PEN, blade-metered methods have recently gained great interest towards the formation of uniform crystalline films over a large area. Following this rationale, we herein designed a versatile approach based on blade-coating, which overcomes the problem of anisotropic crystal formation by manipulating the solvent evaporation behaviour, in a way that brings about a preferential degree of crystal orientation. The applicability of this method was evaluated by fabricating field-effect transistors on glass as well as on silicon dioxide/silicon (SiO2/Si) substrates. Interestingly, in an attempt to improve the rheological and wetting behaviour of the liquid films on the SiO2/Si substrates, we introduced a polymeric interlayer of polystyrene (PS) or polymethylmethacrylate (PMMA) which concurrently acts as passivation and crystallization assisting layer. In this case, the synergistic effects of the highly-ordered crystalline structure and the oxide surface modification were thoroughly investigated. The overall performance of the fabricated devices revealed excellent electrical characteristics, with high saturation mobilities up to 0.72 cm2 V-1 s-1 (on glass with polymeric dielectric), on/off current ratio >104 and low threshold voltage values (<-5 V). This journal is © the Partner Organisations 2014.