27 resultados para LOW HEATING TEMPERATURES

em Cambridge University Engineering Department Publications Database


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Building integrated photovoltaics (BIPV) has the potential to become a major source of renewable energy in the urban environment. BIPV has significant influence on the heat transfer through the building envelope because of the change of the thermal resistance by adding or replacing the building elements. Four different roofs are used to assess the impacts of BIPV on the building's heating-and-cooling loads; namely ventilated air-gap BIPV, non-ventilated (closed) air-gap BIPV, closeroof mounted BIPV, and the conventional roof with no PV and no air gap. One-dimensional transient models of four cases are derived to evaluate the PV performances and building cooling-and-heating loads across the different roofs in order to select the appropriate PV building integration method in Tianjin, China. The simulation results show that the PV roof with ventilated air-gap is suitable for the application in summer because this integration leads to the low cooling load and high PV conversion efficiency. The PV roof with ventilation air-gap has a high time lag and small decrement factor in comparison with other three roofs and has the same heat gain as the cool roof of absorptance 0.4. In winter, BIPV of non-ventilated air gap is more appropriate due to the combination of the low heating-load through the PV roof and high PV electrical output. © 2005 Elsevier Ltd. All rights reserved.

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A simple and cheap procedure for flexible electronics fabrication was demonstrated by imprinting metallic nanoparticles (NPs) on flexible substrates. Silver NPs with an average diameter of 10 nm were prepared via an improved chemical approach and Ag Np ink was produced in α-terpineol with a concentration up to 15%. Silver micro/nanostructures with a dimension varying from nanometres to microns were produced on a flexible substrate (polyimide) by imprinting the as-prepared silver ink. The fine fluidic properties of an Ag NP/α-terpineol solution and low melting temperatures of silver nanoparticles render a low pressure and low temperature procedure, which is well suited for flexible electronics fabrication. The effects of sintering and mechanical bending on the conductivity of imprinted silver contacts were also investigated. Large area organic field effect transistors (OFET) on flexible substrates were fabricated using an imprinted silver electrode and semiconducting polymer. The OFET with silver electrodes imprinted from our prepared oleic acid stabilized Ag nanoparticle ink show an ideal ohmic contact; therefore, the OFET exhibit high performance (Ion/Ioff ratio: 1 × 103; mobility: 0.071 cm2 V-1 s-1). © 2010 IOP Publishing Ltd.

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The use of reactive magnesia (MgO) as the binder in porous blocks demonstrated significant advantages due to its low production temperatures and ability to carbonate, leading to significant strengths. This paper investigates the enhancement of the carbonation process through different curing conditions: water to cement ratio (0.6-0.9), CO2 concentration (5-20%), curing duration (1-7 days), relative humidity (55-98%), and wet/dry cycling frequency (every 0-3 days), improving the carbonation potential through increased amounts of CO2 absorbed and enhanced mechanical performance. UCS results were supported with SEM, XRD, and HCl acid digestion analyses. The results show that CO2 concentrations as low as 5% can produce the required strengths after only 1 day. Drier mixes perform better in shorter curing durations, whereas larger w/c ratios are needed for continuous carbonation. Mixes subjected to 78% RH outperformed all the others, also highlighting the benefits of incorporating wet/dry cycling to induce carbonation. © 2014 Elsevier Ltd.

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Placing a gene of interest under the control of an inducible promoter greatly aids the purification, localization and functional analysis of proteins but usually requires the sub-cloning of the gene of interest into an appropriate expression vector. Here, we describe an alternative approach employing in vitro transposition of Tn Omega P(BAD) to place the highly regulable, arabinose inducible P(BAD) promoter upstream of the gene to be expressed. The method is rapid, simple and facilitates the optimization of expression by producing constructs with variable distances between the P(BAD) promoter and the gene. To illustrate the use of this approach, we describe the construction of a strain of Escherichia coli in which growth at low temperatures on solid media is dependent on threshold levels of arabinose. Other uses of the transposable promoter are also discussed.

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This paper investigates the performance of diode temperature sensors when operated at ultra high temperatures (above 250°C). A low leakage Silicon On Insulator (SOI) diode was designed and fabricated in a 1 μm CMOS process and suspended within a dielectric membrane for efficient thermal insulation. The diode can be used for accurate temperature monitoring in a variety of sensors such as microcalorimeters, IR detectors, or thermal flow sensors. A CMOS compatible micro-heater was integrated with the diode for local heating. It was found that the diode forward voltage exhibited a linear dependence on temperature as long as the reverse saturation current remained below the forward driving current. We have proven experimentally that the maximum temperature can be as high as 550°C. Long term continuous operation at high temperatures (400°C) showed good stability of the voltage drop. Furthermore, we carried out a detailed theoretical analysis to determine the maximum operating temperature and exlain the presence of nonlinearity factors at ultra high temperatures. © 2008 IEEE.

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With the emergence of transparent electronics, there has been considerable advancement in n-type transparent semiconducting oxide (TSO) materials, such as ZnO, InGaZnO, and InSnO. Comparatively, the availability of p-type TSO materials is more scarce and the available materials are less mature. The development of p-type semiconductors is one of the key technologies needed to push transparent electronics and systems to the next frontier, particularly for implementing p-n junctions for solar cells and p-type transistors for complementary logic/circuits applications. Cuprous oxide (Cu2O) is one of the most promising candidates for p-type TSO materials. This paper reports the deposition of Cu2O thin films without substrate heating using a high deposition rate reactive sputtering technique, called high target utilisation sputtering (HiTUS). This technique allows independent control of the remote plasma density and the ion energy, thus providing finer control of the film properties and microstructure as well as reducing film stress. The effect of deposition parameters, including oxygen flow rate, plasma power and target power, on the properties of Cu2O films are reported. It is known from previously published work that the formation of pure Cu2O film is often difficult, due to the more ready formation or co-formation of cupric oxide (CuO). From our investigation, we established two key concurrent criteria needed for attaining Cu2O thin films (as opposed to CuO or mixed phase CuO/Cu2O films). First, the oxygen flow rate must be kept low to avoid over-oxidation of Cu2O to CuO and to ensure a non-oxidised/non-poisoned metallic copper target in the reactive sputtering environment. Secondly, the energy of the sputtered copper species must be kept low as higher reaction energy tends to favour the formation of CuO. The unique design of the HiTUS system enables the provision of a high density of low energy sputtered copper radicals/ions, and when combined with a controlled amount of oxygen, can produce good quality p-type transparent Cu2O films with electrical resistivity ranging from 102 to 104 Ω-cm, hole mobility of 1-10 cm2/V-s, and optical band-gap of 2.0-2.6 eV. These material properties make this low temperature deposited HiTUS Cu 2O film suitable for fabrication of p-type metal oxide thin film transistors. Furthermore, the capability to deposit Cu2O films with low film stress at low temperatures on plastic substrates renders this approach favourable for fabrication of flexible p-n junction solar cells. © 2011 Elsevier B.V. All rights reserved.

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Low-temperature (∼600 °C), scalable chemical vapor deposition of high-quality, uniform monolayer graphene is demonstrated with a mapped Raman 2D/G ratio of >3.2, D/G ratio ≤0.08, and carrier mobilities of ≥3000 cm(2) V(-1) s(-1) on SiO(2) support. A kinetic growth model for graphene CVD based on flux balances is established, which is well supported by a systematic study of Ni-based polycrystalline catalysts. A finite carbon solubility of the catalyst is thereby a key advantage, as it allows the catalyst bulk to act as a mediating carbon sink while optimized graphene growth occurs by only locally saturating the catalyst surface with carbon. This also enables a route to the controlled formation of Bernal stacked bi- and few-layered graphene. The model is relevant to all catalyst materials and can readily serve as a general process rationale for optimized graphene CVD.

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Vertically aligned carbon nanotubes were grown at temperatures as low as 120degreesC by plasma-enhanced chemical vapor deposition. A systematic study of the temperature dependence of the growth rate and the structure of the as-grown nanotubes is presented using a C2H2/NH3 system and nickel as the catalyst. The activation energy for the growth rate was found to be 0.23 eV, much less than for thermal chemical vapor deposition (1.2-1.5 eV). This suggests growth occurs by surface diffusion of carbon on nickel. The result could allow direct growth of nanotubes onto low-temperature substrates like plastics, and facilitate the integration in sensitive nanoelectronic devices. (C) 2003 American Institute of Physics.

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A power LDMOS on partial silicon on insulator (PSOI) with a variable low-κ dielectric (VLKD) buried layer and a buried p (BP) layer is proposed (VLKD BPSOI). At a low κ value, the electric field strength in the buried dielectric (EI) is enhanced, and a Si window makes the substrate share the vertical voltage drop, leading to a high vertical breakdown voltage (BV). Moreover, three interface field peaks are introduced by the BP, the Si window, and the VLKD, which modulate the fields in the SOI layer, the VLKD layer, and the substrate; consequently, a high BV is obtained. Furthermore, the BP reduces the specific on-resistance (Ron), and the Si window alleviates the self-heating effect (SHE). The BV for VLKD BPSOI is enhanced by 34.5%, and Ron is decreased by 26.6%, compared with those for the conventional PSOI, and VLKD BPSOI also maintains a low SHE. © 2006 IEEE.

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This paper describes a new generation of integrated solid-state gas-sensors embedded in SOI micro-hotplates. The micro-hotplates lie on a SOI membrane and consist of MOSFET heaters that elevate the operating temperature, through self-heating, of a gas sensitive material. These sensors are fully compatible with SOI CMOS or BiCMOS technologies, offer ultra-low power consumption (under 100 mW), high sensitivity, low noise, low unit cost, reproducibility and reliability through the use of on-chip integration. In addition, the new integrated sensors offer a nearly uniform temperature distribution over the active area at its operating temperatures at up to about 300-350°C. This makes SOI-based gas-sensing devices particularly attractive for use in handheld battery-operated gas monitors. This paper reports on the design of a chemo-resistive gas sensor and proposes for the first time an intelligent SOI membrane microcalorimeter using active micro-FET heaters and temperature sensors. A comprehensive set of numerical and analogue simulations is also presented including complex 2D and 3D electro-thermal numerical analyses. © 2001 Elsevier Science B.V. All rights reserved.