A closely integrated digital image capture device for embedded applications

A modular image capture system with close integration to CCD cameras has been developed. The aim is to produce a system capable of integrating CCD sensor, image capture and image processing into a single compact unit. This close integration provides a direct mapping between CCD pixels and digital image pixels. The system has been interfaced to a digital signal processor board for the development and control of image processing tasks. These have included characterization and enhancement of noisy images from an intensified camera and measurement to subpixel resolutions. A highly compact form of the image capture system is in an advanced stage of development. This consists of a single FPGA device and a single VRAM providing a two chip image capturing system capable of being integrated into a CCD camera. A miniature compact PC has been developed using a novel modular interconnection technique, providing a processing unit in a three dimensional format highly suited to integration into a CCD camera unit. Work is under way to interface the compact capture system to the PC using this interconnection technique, combining CCD sensor, image capture and image processing into a single compact unit. ©2005 Copyright SPIE - The International Society for Optical Engineering.

An integrated representation of the services provided by global water resources

Water is essential not only to maintain the livelihoods of human beings but also to sustain ecosystems. Over the last few decades several global assessments have reviewed current and future uses of water, and have offered potential solutions to a possible water crisis. However, these have tended to focus on water supply rather than on the range of demands for all water services (including those of ecosystems). In this paper, a holistic global view of water resources and the services they provide is presented, using Sankey diagrams as a visualisation tool. These diagrams provide a valuable addition to the spatial maps of other global assessments, as they track the sources, uses, services and sinks of water resources. They facilitate comparison of different water services, and highlight trade-offs amongst them. For example, they reveal how increasing the supply of water resources to one service (crop production) can generate a reduction in provision of other water services (e.g., to ecosystem maintenance). The potential impacts of efficiency improvements in the use of water are also highlighted; for example, reduction in soil evaporation from crop production through better farming practices, or the results of improved treatment and re-use of return flows leading to reduction of delivery to final sinks. This paper also outlines the measures needed to ensure sustainable water resource use and supply for multiple competing services in the future, and emphasises that integrated management of land and water resources is essential to achieve this goal. © 2013 Elsevier Ltd.

Wave digital filter model of the entire auditory periphery

A model of the auditory periphery assembled from analog network submodels of all the relevant anatomical structures is described. There is bidirectional coupling between networks representing the outer ear, middle ear and cochlea. A simple voltage source representation of the outer hair cells provides level-dependent basilar membrane curves. The networks are translated into efficient computational modules by means of wave digital filtering. A feedback unit regulates the average firing rate at the output of an inner hair cell module via a simplified modelling of the dynamics of the descending paths to the peripheral ear. This leads to a digital model of the entire auditory periphery with applications to both speech and hearing research.

Strategies for designing and developing services for manufacturing firms

Product/service-systems (PSS) are in effect an approach to designing integrated products and services with a focus on both customer and product life cycle activities. A range of service-oriented design strategies can be found in current literature, from product-oriented DfX approaches to more customer-oriented approaches, such as integrated solutions. In this article, design strategies related to different types of services are mapped. Case studies from two industrial companies are used to confront the existing literature in order to improve the understanding of how manufacturing companies may align their product and service development activities with their business strategies. © 2010.

An integrated service-device-technology roadmap for smart city development

Firms and other organizations use Technology Roadmapping (TRM) extensively as a framework for supporting research and development of future technologies and products that could sustain a competitive advantage. While the importance of technology strategy has received more attention in recent years, few research studies have examined how roadmapping processes are used to explore the potential convergence of products and services that may be developed in the future. The aim of this paper is to introduce an integrated roadmapping process for services, devices and technologies capable of implementing a smart city development R&D project in Korea. The paper applies a QFD (Quality Function Deployment) method to establish interconnections between services and devices, and between devices and technologies. The method is illustrated by a detailed case study, which shows how different types of roadmap can be coordinated with each other to produce a clear representation of the technological changes and uncertainties associated with the strategic planning of complex innovations. © 2012 Elsevier Inc.

Performance assessment of XACML authorizations for supply chain traceability web services

Service-Oriented Architecture (SOA) and Web Services (WS) offer advanced flexibility and interoperability capabilities. However they imply significant performance overheads that need to be carefully considered. Supply Chain Management (SCM) and Traceability systems are an interesting domain for the use of WS technologies that are usually deemed to be too complex and unnecessary in practical applications, especially regarding security. This paper presents an externalized security architecture that uses the eXtensible Access Control Markup Language (XACML) authorization standard to enforce visibility restrictions on trace-ability data in a supply chain where multiple companies collaborate; the performance overheads are assessed by comparing 'raw' authorization implementations - Access Control Lists, Tokens, and RDF Assertions - with their XACML-equivalents. © 2012 IEEE.

Energy recycling from multigigahertz clocks using fully integrated switching converters

Large digital chips use a significant amount of energy to broadcast a low-skew, multigigahertz clock to millions of latches located throughout the chip. Every clock cycle, the large aggregate capacitance of the clock network is charged from the supply and then discharged to ground. Instead of wasting this stored energy, it is possible to recycle the energy by controlling its delivery to another part of the chip using an on-chip dc-dc converter. The clock driver and switching converter circuits share many compatible characteristics that allow them to be merged into a single design and fully integrated on-chip. Our buck converter prototype, manufactured in 90-nm CMOS, provides a proof-of-concept that clock network energy can be recycled to other parts of the chip, thus lowering overall energy consumption. It also confirms that monolithic multigigahertz switching converters utilizing zero-voltage switching can be implemented in deep-submicrometer CMOS. With multigigahertz operation, fully integrated inductors and capacitors use a small amount of chip area with low losses. Combining the clock driver with the power converter can share the large MOSFET drivers necessary as well as being energy and space efficient. We present an analysis of the losses which we confirm by experimentally comparing the merged circuit with a conventional clock driver. © 2012 IEEE.