Standard cell automated layout for a CMOS 50 MHz 8 × 8 bit pipelined parallel dadda multiplier

An 8 × 8 pipelined parallel multiplier which uses the Dadda scheme is presented. The multiplier has been implemented in a 3-μm n-well CMOS process with two layers of metal using a standard cell automatic placement and routing program. The design uses a form of pipelined carry look-ahead adder in the final stage of summation, thus providing a significant contribution to the high performance of the multiplier. The design is expected to operate at a clock frequency of at least 50 MHz and has a flush time of seven clock cycles. The design illustrates a possible method of implementing an irregular architecture in VLSI using multiple levels of low-resistance, low-capacitance interconnect and automated layout techniques.

Options for achieving a 50% cut in industrial carbon emissions by 2050.

Carbon emissions from industry are dominated by production of goods in steel, cement plastic, paper, and aluminum. Demand for these materials is anticipated to double at least by 2050, by which time global carbon emissions must be reduced by at least 50%. To evaluate the challenge of meeting this target the global flows of these materials and their associated emissions are projected to 2050 under five technical scenarios. A reference scenario includes all existing and emerging efficiency measures but cannot provide sufficient reduction. The application of carbon sequestration to primary production proves to be sufficient only for cement The emissions target can always be met by reducing demand, for instance through product life extension, material substitution, or "light-weighting". Reusing components shows significant potential particularly within construction. Radical process innovation may also be possible. The results show that the first two strategies, based on increasing primary production, cannot achieve the required emissions reductions, so should be balanced by the vigorous pursuit of material efficiency to allow provision of increased material services with reduced primary production.

The Ic behavior of 2G YBCO tapes under DC/AC magnetic fields at various temperatures

In order to design a High Temperature Superconducting (HTS) machine that is able to operate safely and reliably, studies on the characterization of Second Generation (2G) HTS tapes are of paramount importance. This paper presents an experimental setup to measure critical current of 2G HTS tapes in high DC magnetic fields (up to 5 Tesla) with an AC current ripple superimposed, as well as various temperatures ranging from 25 K to 77 K. The 2G tape measured is the SGS12050 coated conductor made by SuperPower. The critical current is measured by a flux vector with reference to the widest sample face from 0 to 90 degrees in 10 degree steps. Smaller steps are required close to 0 . A Variable Temperature Insert (VTI) is utilized to control temperature change. © 2010 IEEE.

Measurement of the unburnt gas temperature in an IC engine by means of a pressure transducer

A novel method of measuring cylinder gas temperature in an internal combustion engine cylinder is introduced. The physical basis for the technique is that the flow rate through an orifice is a function of the temperature of the gas flowing through the orifice. Using a pressure transducer in the cylinder, and another in a chamber connected to the cylinder via an orifice, it is shown how the cylinder temperature can be determined with useful sensitivity. In this paper the governing equations are derived, which show that the heat transfer characteristics of the chamber are critical to the performance of the system, and that isothermal or adiabatic conditions give the optimum performance. For a typical internal combustion engine, it is found that the pre-compression cylinder temperature is related to the chamber pressure late in the compression process with sensitivity of the order of 0.005 bar/K. Copyright © 2010 SAE International.

On the time delay in continuous in-cylinder sampling from IC engines

When gas sample is continuously drawn from the cylinder of an internal combustion engine, the sample that appears at the end of the sampling system corresponds to the in-cylinder content sometime ago because of the finite transit time which is a function of the cylinder pressure history. This variable delay causes a dispersion of the sample signal and makes the interpretation of the signal difficult An unsteady flow analysis of a typical sampling system was carried out for selected engine loads and speeds. For typical engine operation, a window in which the delay is approximately constant may be found. This window gets smaller with increase in engine speed, with decrease in load, and with the increase in exit pressure of the sampling system.

FEC-free 50 m 1.5 Gb/s plastic optical fibre link using CAP modulation for home networks

LED-based carrierless amplitude and phase modulation is investigated for a multi-gigabit plastic optical fibre link. An FPGA-based 1.5 Gbit/s error free transmission over 50 m standard SI-POF using CAP64 is achieved, providing 2.9 dB power margin without forward error correction. © 2012 OSA.

FEC-free 50 m 1.5 Gb/s plastic optical fibre link using CAP modulation for home networks

LED-based carrierless amplitude and phase modulation is investigated for a multi-gigabit plastic optical fibre link. An FPGA-based 1.5 Gbit/s error free transmission over 50 m standard SI-POF using CAP64 is achieved, providing 2.9 dB power margin without forward error correction. © 2012 Optical Society of America.

Modal control of a 50μm core diameter multimode fiber using a spatial light modulator

An iterative, self-correcting system for doing modal control using adaptive optics in a 50μm core diameter multimode fiber (MMF) is designed. It is shown experimentally to reduce the number of modes generated by 300%. © 2006 Optical Society of America.