Parasitic feedthrough cancellation techniques for enhanced electrical characterization of electrostatic microresonators

Capacitive parasitic feedthrough is an impediment that is inherent to all electrically interfaced micron scale resonant devices, resulting in increased challenges to their integration in more complex circuits, particularly as devices are scaled to operate at higher frequencies for RF applications. In this paper, a technique to cancel the undesirable effects of capacitive feedthrough that was previously proposed is here developed for an on-chip implementation. The method reported in this paper benefits from the simplicity of its implementation, and its effectiveness is demonstrated in this paper. This technique is demonstrated for two disk-plate resonators that have been excited in the wine glass mode at 5.4 MHz, though applicable to almost any electrically interfaced resonator. Measurements of the electrical transmission from these resonators show that the magnitude of the frequency response of the system is enhanced by up to 19 dB, while the phase is found to shift through a full 180° about the resonant frequency. This method is proposed as a useful addition to other techniques for enhancing the measured response of electrostatic micromechanical resonators. © 2009 Elsevier B.V. All rights reserved.

One step self-aligned multilayer patterning process for the fabrication of organic complementary circuits in combination with inkjet printing

Recent development of solution processable organic semiconductors delineates the emergence of a new generation of air-stable, high performance p- and n-type materials. This makes it indeed possible for printed organic complementary circuits (CMOS) to be used in real applications. The main technical bottleneck for organic CMOS to be adopted as the next generation organic integrated circuit is how to deposit and pattern both p- and n-type semiconductor materials with high resolutions at the same time. It represents a significant technical challenge, especially if it can be done for multiple layers without mask alignment. In this paper, we propose a one-step self-aligned fabrication process which allows the deposition and high resolution patterning of functional layers for both p- and n-channel thin film transistors (TFTs) simultaneously. All the dimensional information of the device components is featured on a single imprinting stamp, and the TFT-channel geometry, electrodes with different work functions, p- and n-type semiconductors and effective gate dimensions can all be accurately defined by one-step imprinting and the subsequent pattern transfer process. As an example, we have demonstrated an organic complementary inverter fabricated by 3D imprinting in combination with inkjet printing and the measured electrical characteristics have validated the feasibility of the novel technique. © 2012 Elsevier B.V. All rights reserved.

NEMS based logic and memory circuits

Carbon nanotube (CNT) based nano electromechanical system (NEMS) were developed to apply to the logic and the memory circuit. The electrical 'on-off' behavior induced by the mechanical movements of CNTs can promise low power consumption in circuit with very low level leakage current. Additionally, the unique vertical structure of nanotubes allows high integration density for devices. © 2012 IEEE.

A novel modeling approach for design studies of brushless doubly fed induction generator based on magnetic equivalent circuit

Brushless doubly fed induction generator (BDFIG) has substantial benefits, which make it an attractive alternative as a wind turbine generator. However, it suffers from lower efficiency and larger dimensions in comparison to DFIG. Hence, optimizing the BDFIG structure is necessary for enhancing its situation commercially. In previous studies, a simple model has been used in BDFIG design procedure that is insufficiently accurate. Furthermore, magnetic saturation and iron loss are not considered because of difficulties in determination of flux density distributions. The aim of this paper is to establish an accurate yet computationally fast model suitable for BDFIG design studies. The proposed approach combines three equivalent circuits including electric, magnetic and thermal models. Utilizing electric equivalent circuit makes it possible to apply static form of magnetic equivalent circuit, because the elapsed time to reach steady-state results in the dynamic form is too long for using in population-based design studies. The operating characteristics, which are necessary for evaluating the objective function and constraints values of the optimization problem, can be calculated using the presented approach considering iron loss, saturation, and geometrical details. The simulation results of a D-180 prototype BDFIG are compared with measured data in order to validate the developed model. © 1986-2012 IEEE.