84 resultados para EFFECT TRANSISTORS

em Cambridge University Engineering Department Publications Database


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The subthreshold slope, transconductance, threshold voltage, and hysteresis of a carbon nanotube field-effect transistor (CNT FET) were examined as its configuration was changed from bottom-gate exposed channel, bottom-gate covered channel to top-gate FET. An individual single wall CNT was grown by chemical vapor deposition and its gate configuration was changed while determining its transistor characteristics to ensure that the measurements were not a function of different chirality or diameter CNTs. The bottom-gate exposed CNT FET utilized 900 nm SiO2 as the gate insulator. This CNT FET was then covered with TiO2 to form the bottom-gate covered channel CNT FET. Finally, the top-gate CNT FET was fabricated and the device utilized TiO 2 (K ∼ 80, equivalent oxide thickness=0.25 nm) as the gate insulator. Of the three configurations investigated, the top-gate device exhibited best subthreshold slope (67-70 mV/dec), highest transconductance (1.3 μS), and negligible hysteresis in terms of threshold voltage shift. © 2006 American Institute of Physics.

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This paper presents direct growth of horizontally aligned carbon nanotubes (CNTs) between two predefined various inter-spacing up to tens of microns of electrodes (pads) and its use as CNT field-effect transistors (CNT-FETs). The catalytic metals were prepared, consisting of iron (Fe), aluminum (Al) and platinum (Pt) triple layers, on the thermal silicon oxide substrate (Pt/Al/Fe/SiO2). Scanning electron microscopy measurements of CNT-FETs from the as-grown samples showed that over 80% of the nanotubes are grown across the catalytic electrodes. Moreover, the number of CNTs across the catalytic electrodes is roughly controllable by adjusting the growth condition. The Al, as the upper layer on Fe electrode, not only plays a role as a barrier to prevent vertical growth but also serves as a porous medium that helps in forming smaller nano-sized Fe particles which would be necessary for lateral growth of CNTs. Back-gate field effect transistors were demonstrated with the laterally aligned CNTs. The on/off ratios in all the measured devices are lower than 100 due to the drain leakage current. ©2010 IEEE.

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We demonstrated a controllable tuning of the electronic characteristics of ZnO nanowire field effect transistors (FETs) using a high-energy proton beam. After a short proton irradiation time, the threshold voltage shifted to the negative gate bias direction with an increase in the electrical conductance, whereas the threshold voltage shifted to the positive gate bias direction with a decrease in the electrical conductance after a long proton irradiation time. The electrical characteristics of two different types of ZnO nanowires FET device structures in which the ZnO nanowires are placed on the substrate or suspended above the substrate and photoluminescence (PL) studies of the ZnO nanowires provide substantial evidence that the experimental observations result from the irradiation-induced charges in the bulk SiO(2) and at the SiO(2)/ZnO nanowire interface, which can be explained by a surface-band-bending model in terms of gate electric field modulation. Our study on the proton-irradiation-mediated functionalization can be potentially interesting not only for understanding the proton irradiation effects on nanoscale devices, but also for creating the property-tailored nanoscale devices.

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Surface-architecture-controlled ZnO nanowires were grown using a vapor transport method on various ZnO buffer film coated c-plane sapphire substrates with or without Au catalysts. The ZnO nanowires that were grown showed two different types of geometric properties: corrugated ZnO nanowires having a relatively smaller diameter and a strong deep-level emission photoluminescence (PL) peak and smooth ZnO nanowires having a relatively larger diameter and a weak deep-level emission PL peak. The surface morphology and size-dependent tunable electronic transport properties of the ZnO nanowires were characterized using a nanowire field effect transistor (FET) device structure. The FETs made from smooth ZnO nanowires with a larger diameter exhibited negative threshold voltages, indicating n-channel depletion-mode behavior, whereas those made from corrugated ZnO nanowires with a smaller diameter had positive threshold voltages, indicating n-channel enhancement-mode behavior.