Three dimensional distributions of arsenic and platinum within NiSi contact and gate of an n-type transistor

Atom probe tomography was used to study the redistribution of platinum and arsenic atoms after Ni(Pt) silicidation of As-doped polycrystalline Si. These measurements were performed on a field-effect transistor and compared with those obtained in unpatterned region submitted to the same process. These results suggest that Pt and As redistribution during silicide formation is only marginally influenced by the confinement in microelectronic devices. On the contrary, there is a clear difference with the redistribution reported in the literature for the blanket wafers. Selective etching used to remove the non-reacted Ni(Pt) film after the first rapid heat treatment may induce this difference. © 2011 American Institute of Physics.

Analysis of amorphous indium-gallium-zinc-oxide thin-film transistor contact metal using Pilling-Bedworth theory and a variable capacitance diode model

It is widely reported that threshold voltage and on-state current of amorphous indium-gallium-zinc-oxide bottom-gate thin-film transistors are strongly influenced by the choice of source/drain contact metal. Electrical characterisation of thin-film transistors indicates that the electrical properties depend on the type and thickness of the metal(s) used. Electron transport mechanisms and possibilities for control of the defect state density are discussed. Pilling-Bedworth theory for metal oxidation explains the interaction between contact metal and amorphous indium-gallium-zinc-oxide, which leads to significant trap formation. Charge trapping within these states leads to variable capacitance diode-like behavior and is shown to explain the thin-film transistor operation. © 2013 AIP Publishing LLC.

Progress in the understanding of Ni silicide formation for advanced MOS structures

Metallic silicides have been used as contact materials on source/drain and gate in metal-oxide semiconductor (MOS) structure for 40 years. Since the 65 nm technology node, NiSi is the preferred material for contact in microelectronic due to low resistivity, low thermal budget, and low Si consumption. Ni(Pt)Si with 10 at.% Pt is currently employed in recent technologies since Pt allows to stabilize NiSi at high temperature. The presence of Pt and the very low thickness (<10 nm) needed for the device contacts bring new concerns for actual devices. In this work, in situ techniques [X-ray diffraction (XRD), X-ray reflectivity (XRR), sheet resistance, differential scanning calorimetry (DSC)] were combined with atom probe tomography (APT) to study the formation mechanisms as well as the redistribution of dopants and alloy elements (Pt, Pd.) during the silicide formation. Phenomena like nucleation, lateral growth, interfacial reaction, diffusion, precipitation, and transient phase formation are investigated. The effect of alloy elements (Pt, Pd.) and dopants (As, B.) as well as stress and defects induced by the confinement in devices on the silicide formation mechanism and alloying element redistribution is examined. In particular APT has been performed for the three-dimensional (3D) analysis of MOSFET at the atomic scale. The advances in the understanding of the mechanisms of formation and redistribution are discussed. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Ni(Pt)-silicide contacts on CMOS devices: Impact of substrate nature and Pt concentration on the phase formation

Ni silicides used as contacts in source/drain and gate of advanced CMOS devices were analyzed by atom probe tomography (APT) at atomic scale. These measurements were performed on 45 nm nMOS after standard self-aligned silicide (salicide) process using Ni(5 at.% Pt) alloy. After the first annealing (RTA1), δ-Ni2Si was the only phase formed on gate and source/drain while, after the second annealing (RTA2), two different Ni silicides have been formed: NiSi on the gate and δ-Ni2Si on the source and drain. This difference between source/drain and gate regions in nMOS devices has been related to the Si substrate nature (poly or mono-crystalline) and to the size of the contact. In fact, NiSi seems to have difficulties to nucleate in the narrow source/drain contact on mono-crystalline Si. The results have been compared to analysis performed on 28 nm nMOS where the Pt concentration is higher (10 at.% Pt). In this case, θ-Ni2Si is the first phase to form after RTA1 and NiSi is then formed at the same time on source (or drain) and gate after RTA2. The absence of the formation of NiSi from δ-Ni 2Si/Si(1 0 0) interface compared to θ-Ni2Si/Si(1 0 0) interface could be related to the difference of the interface energies. The redistributions of As and Pt in different silicides and interfaces were measured and discussed. In particular, it has been evidenced that Pt redistributions obtained on both 45 and 28 nm MOS transistors correspond to respective Pt distributions measured on blanket wafers. © 2013 Elsevier B.V. All rights reserved.