Theoretical and numerical investigation of SiC JFET and MOSFET at 6.5 kV

This paper presents a preliminary theoretical and numerical investigation of 4H-SiC JFET and MOSFET at 6.5 kV. To improve the on-state/breakdown performance of the JFET, buried layers in conjunction with a highly doped buffer layer have been used. Trench technology has been employed for the MOSFET. The devices were simulated and optimized using MEDICI[I] simulator. From the comparison between the two devices, it turns out that the JFET offers a better on-state/breakdown trade-off, while the trench MOSFET has the advantage of MOS-control.

Amorphous carbon for use in thin film transistors

Tetrahedrally bonded amorphous carbon (ta-C) is a new type of semiconducting thin film material. It can be produced at room temperature using the Filtered Cathodic Vacuum Arc technique. The as-grown undoped ta-C is p-type in nature but it can be n-doped by the addition of nitrogen during deposition. This paper will describe thin film transistor design and fabrication using ta-C as the active channel layer.

Spinning off a semiconductor company from University premises -The story of Camsemi

The spinning off of Cambridge Semiconductor Ltd (Camsemi) from the High Voltage Microelectronics Lab at Cambridge University is discussed. The technology originated from Cambridge University and was subsequently developed and commercialized as PowerBrane by Camsemi. The paper also discusses the business model and the enabling financial factors that led to the formation of Camsemi as a fables IC company, including access to seed funding from University and the subsequent investments of venture capital in several rounds. © 2011 IEEE.

SOI membrane-based pressure sensor in stress sensitive differential amplifier configuration

This paper introduces a pressure sensing structure configured as a stress sensitive differential amplifier (SSDA), built on a Silicon-on-Insulator (SOI) membrane. Theoretical calculation show the significant increase in sensitivity which is expected from the pressure sensors in SSDA configuration compared to the traditional Wheatstone bridge circuit. Preliminary experimental measurements, performed on individual transistors placed on the membrane, exhibit state-the-art sensitivity values (1.45mV/mbar). © 2012 IEEE.

SOI sensing technologies for harsh environment

This paper reviews and addresses certain aspects of Silicon-On-Insulator (SOI) technologies for a harsh environment. The paper first describes the need for specialized sensors in applications such as (i) domestic and other small-scale boilers, (ii) CO2 Capture and Sequestration, (iii) oil & gas storage and transportation, and (iv) automotive. We describe in brief the advantages and special features of SOI technology for sensing applications requiring temperatures in excess of the typical bulk silicon junction temperatures of 150oC. Finally we present the concepts, structures and prototypes of simple and smart micro-hotplate and Infra Red (IR) based emitters for NDIR (Non Dispersive IR) gas sensors in harsh environments. © 2012 IEEE.

A high temperature and low power SOI CMOS MEMS based thermal conductivity gas sensor

The design, 3D FEM modelling and measurement results of a novel high temperature, low power SOI CMOS MEMS thermal conductivity gas sensor are presented here. The sensor consists of a circular membrane with an embedded tungsten micro-heater. The high sensing capability is based on the temperature sensitivity of the resistive heating element. The sensor was fabricated at a commercial foundry using a 1 μm process and measures only 1×1 mm 2. The circular membrane has a 600 μm diameter while the heating element has a 320 μm diameter. Measurement results show that for a constant power consumption of 75 mW the heater temperature was 562.4°C in air, 565.9°C in N2, 592.5°C for 1 % H2 in Ar and 599.5°C in Ar. © 2013 IEEE.

A thermopile based SOI CMOS MEMS wall shear stress sensor

In this paper we present for the first time, a novel silicon on insulator (SOI) complementary metal oxide semiconductor (CMOS) MEMS thermal wall shear stress sensor based on a tungsten hot-film and three thermopiles. These devices have been fabricated using a commercial 1 μm SOI-CMOS process followed by a deep reactive ion etch (DRIE) back-etch step to create silicon oxide membranes under the hot-film for effective thermal isolation. The sensors show an excellent repeatability of electro-thermal characteristics and can be used to measure wall shear stress in both constant current anemometric as well as calorimetric modes. The sensors have been calibrated for wall shear stress measurement of air in the range of 0-0.48 Pa using a suction type, 2-D flow wind tunnel. The calibration results show that the sensors have a higher sensitivity (up to four times) in calorimetric mode compared to anemometric mode for wall shear stress lower than 0.3 Pa. © 2013 IEEE.