Negligible penalty all-optical routing using a 12 × 12 passive InP wavelength-selective router

This work demonstrates transmission at 2.5 Gbit/s across two wavelength-division multiplexing (WDM) network nodes, constructed using counter-propagating semiconductor optical amplifier (SOA) wavelength converters and an integrated wavelength-selective router separated by 45 km of fiber, with an overall penalty of 0.6 dB. Minimal degradation of the eye diagram is evident across the whole system. Full utilization of the capacity of the router would allow an aggregate 360-Gbit/s node capacity for a WDM channel of 2.5 Gb/s.

FPGA, physics-based modeling of IGBT and pin diode for hardware co-simulation of complex power electronic converters and systems

This paper presents the steps and the challenges for implementing analytical, physics-based models for the insulated gate bipolar transistor (IGBT) and the PIN diode in hardware and more specifically in field programmable gate arrays (FPGAs). The models can be utilised in hardware co-simulation of complex power electronic converters and entire power systems in order to reduce the simulation time without compromising the accuracy of results. Such a co-simulation allows reliable prediction of the system's performance as well as accurate investigation of the power devices' behaviour during operation. Ultimately, this will allow application-specific optimisation of the devices' structure, circuit topologies as well as enhancement of the control and/or protection schemes.