2.1 GHz MOS mixer linearisation approach for IIP2 enhancement using multiple factor compensation

An integrated downconversion CMOS mixer incorporating a comprehensive compensation scheme is presented which aims to minimise second-order intermodulation distortion (IMD2). Unlike previously reported IMD2 calibration schemes which tune only one nonlinear factor at a time, the presented solution allows simultaneous adjustment of several different factors thus achieving a better compensation. The mixer has been implemented in UMC 0.18 μm CMOS to verify the proposed scheme and for comparison with alternative compensation methods. Measurements show that the solution described can improve the input intercept point (IIP2) by over 20 dB while maintaining good amplification and noise performance. IMD2 calibration results are presented and show useful advantages over other approaches. To the best of the authors' knowledge, this scheme for IMD2 calibration has not been previously reported. © The Institution of Engineering and Technology 2013.

1.4 kV, 25 A, PT and NPT Trench IGBTs with optimum forward characteristics

In this paper we report the development of 1.4 kV 25 A PT and NPT Trench IGBTs with ultra-low on-resistance, latch-up free operation and highly superior overall performance when compared to previously reported DMOS IGBTs in the same class. We have fabricated both PT and transparent anode NPT devices to cover a wide range of applications which require very low on-state losses or very fast time with ultra-low switching losses. The minimum forward voltage drop at the standard current density of 100A/cm2 was 1.1 V for PT non-irradiated devices and 2.1 V for 16 MRad PT irradiated devices. The non-irradiated transparent emitter NPT structure has a typical forward voltage drop of 2.2 V, a turn-off time below 100 ns and turn-off energy losses of 11.2 mW/cm2 at 125 C. The maximum controllable current density was in excess of 1000A/cm2.