Characterization of defect removal in hydrogenated and deuterated amorphous silicon thin film transistors

Thin film transistors (TFTs) utilizing an hydrogenated amorphous silicon (a-Si:H) channel layer exhibit a shift in the threshold voltage with time under the application of a gate bias voltage due to the creation of metastable defects. These defects are removed by annealing the device with zero gate bias applied. The defect removal process can be characterized by a thermalization energy which is, in turn, dependent upon an attempt-to-escape frequency for defect removal. The threshold voltage of both hydrogenated and deuterated amorphous silicon (a-Si:D) TFTs has been measured as a function of annealing time and temperature. Using a molecular dynamics simulation of hydrogen and deuterium in a silicon network in the H2 * configuration, it is shown that the experimental results are consistent with an attempt-to-escape frequency of (4.4 ± 0.3) × 1013 Hz and (5.7 ± 0.3) × 1013 Hz for a-Si:H and a-Si:D respectively which is attributed to the oscillation of the Si-H and Si-D bonds. Using this approach, it becomes possible to describe defect removal in hydrogenated and deuterated material by the thermalization energies of (1.552 ± 0.003) eV and (1.559 ± 0.003) eV respectively. This correlates with the energy per atom of the Si-H and Si-D bonds. © 2006 Elsevier B.V. All rights reserved.

How to achieve high mobility thin film transistors by direct deposition of silicon using 13.56 MHz RF PECVD?

CMOS nanocrystalline silicon thin film transistors with high field effect mobility are reported. The transistors were directly deposited by radio-frequency plasma enhanced chemical vapor deposition at 150°C The transistors show maximum field effect mobility of 450 cm2/V-s for electrons and 100 cm2/V-s for holes at room temperature. We attribute the high mobilities to a reduction of the oxygen content, which acts as an accidental donor. Indeed, secondary ion mass spectrometry measurements show that the impurity concentration in the nanocrystalline Si layer is comparable to, or lower than, the defect density in the material, which is already low thanks to hydrogen passivation.

Erratum: "Zinc oxide nanostructures and high electron mobility nanocomposite thin film transistors" (IEEE Transactions on Electron Devices (2009))

In the above entitled paper (ibid., vol. 55, no. 11, pp. 3001-3011), two errors were noticed after the paper went to press. The errors are corrected here.

ZnO thin film surface acoustic wave based lab-on-a-chip

Lab-on-a-chip (LOC) is one of the most important microsystem applications with promise for use in microanalysis, drug development, diagnosis of illness and diseases etc. LOC typically consists of two main components: microfluidics and sensors. Integration of microfluidics and sensors on a single chip can greatly enhance the efficiency of biochemical reactions and the sensitivity of detection, increase the reaction/detection speed, and reduce the potential cross-contamination, fabrication time and cost etc. However, the mechanisms generally used for microfluidics and sensors are different, making the integration of the two main components complicated and increases the cost of the systems. A lab-on-a-chip system based on a single surface acoustic wave (SAW) actuation mechanism is proposed. SAW devices were fabricated on nanocrystalline ZnO thin films deposited on Si substrates using sputtering. Coupling of acoustic waves into a liquid induces acoustic streaming and motion of droplets. A streaming velocity up to ∼ 5cm/s and droplet pumping speeds of ∼lcm/s were obtained. It was also found that a higher order mode wave, the Sezawa wave is more effective in streaming and transportation of microdroplets. The ZnO SAW sensor has been used for prostate antigen/antibody biorecognition systems, demonstrated the feasibility of using a single actuation mechanism for lab-on-a-chip applications. © 2010 Materials Research Society.

High mobility N-channel and P-channel nanocrystalline silicon thin-film transistors

We report high hole and electron mobilities in nanocrystalline silicon (nc-Si:H) top-gate staggered thin-film transistors (TFTs) fabricated by direct plasma-enhanced chemical vapor deposition (PECVD) at 260°C. The n-channel nc-Si:H TFT with n+ nc-Si:H ohmic contacts shows a field-effect electron mobility (μnFE) of 130 cm2/Vs, which increases to 150 cm2/Vs with Cr-silicide contacts, along with a field-effect hole mobility (μhFE) of 25 cm2/Vs. To the best of our knowledge, the hole and electron mobilities reported here are the highest achieved to date using direct PECVD. © 2005 IEEE.

Effect of gate dielectric scaling in nanometer scale vertical thin film transistors

A short channel vertical thin film transistor (VTFT) with 30 nm SiN x gate dielectric is reported for low voltage, high-resolution active matrix applications. The device demonstrates an ON/OFF current ratio as high as 10 9, leakage current in the fA range, and a sub-threshold slope steeper than 0.23 V/dec exhibiting a marked improvement with scaling of the gate dielectric thickness. © 2011 American Institute of Physics.

Soft-lithographic processed soluble micropatterns of reduced graphene oxide for wafer-scale thin film transistors and gas sensors

PDMS based imprinting is firstly developed for patterning of rGO on a large area. High quality stripe and square shaped rGO patterns are obtained and the electrical properties of the rGO film can be adjusted by the concentration of GO suspension. The arrays of rGO electronics are fabricated from the patterned film by a simple shadow mask method. Gas sensors, which are based on these rGO electronics, show high sensitivity and recyclable usage in sensing NH 3. © 2012 The Royal Society of Chemistry.

Metastability mechanisms in thin film transistors quantitatively resolved using post-stress relaxation of threshold voltage

A new approach is presented to resolve bias-induced metastability mechanisms in hydrogenated amorphous silicon (a-Si:H) thin film transistors (TFTs). The post stress relaxation of threshold voltage (V(T)) was employed to quantitatively distinguish between the charge trapping process in gate dielectric and defect state creation in active layer of transistor. The kinetics of the charge de-trapping from the SiN traps is analytically modeled and a Gaussian distribution of gap states is extracted for the SiN. Indeed, the relaxation in V(T) is in good agreement with the theory underlying the kinetics of charge de-trapping from gate dielectric. For the TFTs used in this work, the charge trapping in the SiN gate dielectric is shown to be the dominant metastability mechanism even at bias stress levels as low as 10 V.

Performance of thin film carbon materials and carbon nanotubes as cold cathodes

The field emissions from three different types of carbon films are studied using a Kiethly voltage-current source-measure unit under computer control. The three types of carbon films are : 1) a-C:H:N deposited using an inductively coupled rf PECVD process, where the N content in the films can be as high as 30 at %; 2) cathodic arc deposited tetrahedral amorphous carbon with embedded regions of carbon nanotube and anion structures and 3) unoriented carbon nanotube films on a porous substrate. The films are formed by filtering a solution of nanotubes dispersed in alcohol through the pores and drying.