High velocity vortex channeling in vicinal YBCO thin films

We report on electrical transport measurements at high current densities on optimally doped YBa 2Cu 3O 7-δ thin films grown on vicinal SrTiO 3 substrates. Data were collected by using a pulsed-current technique in a four-probe arrangement, allowing to extend the current-voltage characteristics to high supercritical current densities (up to 24 MA cm -2) and high electric fields (more than 20 V/cm), in the superconducting state at temperatures between 30 and 80 K. The electric measurements were performed on tracks perpendicular to the vicinal step direction, such that the current crossed between ab planes, under magnetic field rotated in the plane defined by the crystallographic c axis and the current density. At magnetic field orientation parallel to the cuprate layers, evidence for the sliding motion along the ab planes (vortex channeling) was found. The signature of vortex channeling appeared to get enhanced with increasing electric field, due to the peculiar depinning features in the kinked vortex range. They give rise to a current-voltage characteristics steeper than in the more off-plane rectilinear vortex orientations, in the electric field range below approximately 1 V/cm. Roughly above this value, the high vortex channeling velocities (up to 8.6 km/s) could be ascribed to the flux flow, although the signature of ohmic transport appeared to be altered by unavoidable macroscopic self-heating and hot-electron-like effects. © 2012 Elsevier B.V. All rights reserved.

Conduction bottleneck in silicon nanochain single electron transistors operating at room temperature

Single electron transistors are fabricated on single Si nanochains, synthesised by thermal evaporation of SiO solid sources. The nanochains consist of one-dimensional arrays of ~10nm Si nanocrystals, separated by SiO 2 regions. At 300 K, strong Coulomb staircases are seen in the drain-source current-voltage (I ds-V ds) characteristics, and single-electron oscillations are seen in the drain-source current-gate voltage (I ds-V ds) characteristics. From 300-20 K, a large increase in the Coulomb blockade region is observed. The characteristics are explained using singleelectron Monte Carlo simulation, where an inhomogeneous multiple tunnel junction represents a nanochain. Any reduction in capacitance at a nanocrystal well within the nanochain creates a conduction " bottleneck", suppressing current at low voltage and improving the Coulomb staircase. The single-electron charging energy at such an island can be very high, ~20k BT at 300 K. © 2012 The Japan Society of Applied Physics.

Gated three-terminal device architecture to eliminate persistent photoconductivity in oxide semiconductor photosensor arrays

The composition of amorphous oxide semiconductors, which are well known for their optical transparency, can be tailored to enhance their absorption and induce photoconductivity for irradiation with green, and shorter wavelength light. In principle, amorphous oxide semiconductor-based thin-film photoconductors could hence be applied as photosensors. However, their photoconductivity persists for hours after illumination has been removed, which severely degrades the response time and the frame rate of oxide-based sensor arrays. We have solved the problem of persistent photoconductivity (PPC) by developing a gated amorphous oxide semiconductor photo thin-film transistor (photo-TFT) that can provide direct control over the position of the Fermi level in the active layer. Applying a short-duration (10 ns) voltage pulse to these devices induces electron accumulation and accelerates their recombination with ionized oxygen vacancy sites, which are thought to cause PPC. We have integrated these photo-TFTs in a transparent active-matrix photosensor array that can be operated at high frame rates and that has potential applications in contact-free interactive displays. © 2012 Macmillan Publishers Limited. All rights reserved.

Light-matter interaction in a microcavity-controlled graphene transistor

Graphene has extraordinary electronic and optical properties and holds great promise for applications in photonics and optoelectronics. Demonstrations including high-speed photodetectors, optical modulators, plasmonic devices, and ultrafast lasers have now been reported. More advanced device concepts would involve photonic elements such as cavities to control light-matter interaction in graphene. Here we report the first monolithic integration of a graphene transistor and a planar, optical microcavity. We find that the microcavity-induced optical confinement controls the efficiency and spectral selection of photocurrent generation in the integrated graphene device. A twenty-fold enhancement of photocurrent is demonstrated. The optical cavity also determines the spectral properties of the electrically excited thermal radiation of graphene. Most interestingly, we find that the cavity confinement modifies the electrical transport characteristics of the integrated graphene transistor. Our experimental approach opens up a route towards cavity-quantum electrodynamics on the nanometre scale with graphene as a current-carrying intra-cavity medium of atomic thickness. © 2012 Macmillan Publishers Limited. All rights reserved.

Cryogenic single-shot spectroscopy of a floating poly-silicon gate transistor

Trapped electrons, located close to the channel of a transistor, are promising as data storage elements in non-classical information processing. Cryogenic microwave spectroscopy has shown that these electrons give rise to high quality factor resonances in the drain current and a post excitation dynamic behaviour that is related to the system lifetime. Using a floating poly-silicon gate transistor, single shot spectroscopy is performed to characterise the dynamic behaviour during excitation. This behaviour is seen to be dominated by the decay of the transient component, which gives rise to oscillations around the high quality factor resonance. © 2012 American Institute of Physics.

200-V lateral superjunction LIGBT on partial SOI

This letter presents a novel lateral superjunction lateral insulated-gate bipolar transistor (LIGBT) in partial silicon-on-insulator (SOI) technology in 0.18-μm partial-SOI (PSOI) high-voltage (HV) process. For an n-type superjunction LIGBT, the p-layer in the superjunction drift region not only helps in achieving uniform electric field distribution but also contributes to the on-state current. The superjunction LIGBT successfully achieves a breakdown voltage (BV) of 210 V with an R dson of 765 mΩ ̇ mm 2. It exhibits half the value of specific on-state resistance R dson and three times higher saturation current (I dsat) for the same BV, compared to a comparable lateral superjunction laterally diffused metal-oxide-semiconductor fabricated in the same technology. It also performs well in higher temperature dc operation with 38.8% increase in R dson at 175°C, compared to the room temperature without any degradation in latch-up performance. To realize this device, it only requires one additional mask layer into X-FAB 0.18-μm PSOI HV process. © 2012 IEEE.

Electron spin resonance signature of the oxygen vacancy in HfO 2

The oxygen vacancy has been inferred to be the critical defect in HfO 2, responsible for charge trapping, gate threshold voltage instability, and Fermi level pinning for high work function gates, but it has never been conclusively identified. Here, the electron spin resonance g tensor parameters of the oxygen vacancy are calculated, using methods that do not over-estimate the delocalization of the defect wave function, to be g xx = 1.918, g yy = 1.926, g zz = 1.944, and are consistent with an observed spectrum. The defect undergoes a symmetry lowering polaron distortion to be localized mainly on a single adjacent Hf ion. © 2012 American Institute of Physics.

Synthesis of 10 nm Ag nanoparticle polymer composite pastes for low temperature production of high conductivity films

The conversion of silver nanoparticle (NP) paste films into highly conductive films at low sintering temperature is an important requirement for the developing areas of additive fabrication and printed electronics. Ag NPs with a diameter of ∼10 nm were prepared via an improved chemical process to produce viscous paste with a high wt%. The paste consisted of as-prepared Ag NP and an organic vehicle of ethylcellulose that was deposited on glass and Si substrates using a contact lithographic technique. The morphology and conductivity of the imprinted paste film were measured as a function of sintering temperature, sintering time and the percentage ratio of Ag NP and ethylcellulose. The morphology and conductivity were examined using scanning electron microscopy (SEM) and a two-point probe electrical conductivity measurement. The results show that the imprinted films were efficiently converted into conducting states when exposed to sintering temperature in the range of 200-240 °C, this temperature is lower than the previously reported values for Ag paste. © 2010 Elsevier B.V. All rights reserved.

200 v superjunction N-type lateral insulated-gate bipolar transistor with improved latch-up characteristics

This paper evaluates the technique used to improve the latching characteristics of the 200 V n-type superjunction (SJ) lateral insulated-gate bipolar transistor (LIGBT) on a partial silicon-on-insulator. SJ IGBT devices are more prone to latch-up than standard IGBTs due to the presence of a strong pnp transistor with the p layer serving as an effective collector of holes. The initial SJ LIGBT design latches at about 23 V with a gate voltage of 5 V with a forward voltage drop (VON) of 2 V at 300 Acm2. The latch-up current density is 1100 Acm2. The latest SJ LIGBT design shows an increase in latch-up voltage close to 100 V without a significant penalty in VON. The latest design shows a latch-up current density of 1195 A cm2. The enhanced robustness against static latch-up leads to a better forward bias safe operating area. © 1963-2012 IEEE.

Use of a high-temperature superconducting coil for magnetic energy storage

A high temperature superconducting magnetic energy storage device (SMES) has been realised using a 350 m-long BSCCO tape wound as a pancake coil. The coil is mounted on a cryocooler allowing temperatures down to 17.2 K to be achieved. The temperature dependence of coil electrical resistance R(T) shows a superconducting transition at T 102.5 K. Measurements of the V(I) characteristics were performed at several temperatures between 17.2 K and 101.5 K to obtain the temperature dependence of the critical current (using a 1 νV/cm criterion). Critical currents were found to exceed 100 A for T < 30 K. An electronic DC-DC converter was built in order to control the energy flow in and out of the superconducting coil. The converter consists of a MOS transistor bridge switching at a 80 kHz frequency and controlled with standard Pulse Width Modulation (PWM) techniques. The system was tested using a 30 V squared wave power supply as bridge input voltage. The coil current, the bridge input and output voltages were recorded simultaneously. Using a 10 A setpoint current in the superconducting coil, the whole system (coil + DC-DC converter) can provide a stable output voltage showing uninterruptible power supply (UPS) capabilities over 1 s. © 2006 IOP Publishing Ltd.

Analysis of amorphous indium-gallium-zinc-oxide thin-film transistor contact metal using Pilling-Bedworth theory and a variable capacitance diode model

It is widely reported that threshold voltage and on-state current of amorphous indium-gallium-zinc-oxide bottom-gate thin-film transistors are strongly influenced by the choice of source/drain contact metal. Electrical characterisation of thin-film transistors indicates that the electrical properties depend on the type and thickness of the metal(s) used. Electron transport mechanisms and possibilities for control of the defect state density are discussed. Pilling-Bedworth theory for metal oxidation explains the interaction between contact metal and amorphous indium-gallium-zinc-oxide, which leads to significant trap formation. Charge trapping within these states leads to variable capacitance diode-like behavior and is shown to explain the thin-film transistor operation. © 2013 AIP Publishing LLC.

Non-ohmic contact resistance and field-effect mobility in nanocrystalline silicon thin film transistors

Contact resistance has a significant impact on the electrical characteristics of thin film transistors. It limits their maximum on-current and affects their subsequent behavior with bias. This distorts the extracted device parameters, in particular, the field-effect mobility. This letter presents a method capable of accounting for both the non-ohmic (nonlinear) and ohmic (linear) contact resistance effects solely based upon terminal I-V measurements. Applying our analysis to a nanocrystalline silicon thin film transistor, we demonstrate that contact resistance effects can lead to a twofold underestimation of the field-effect mobility. © 2008 American Institute of Physics.

How to achieve ultra high photoconductive gain for transparent oxide semiconductor image sensors

We present quantitative analysis of the ultra-high photoconductivity in amorphous oxide semiconductor (AOS) thin film transistors (TFTs), taking into account the sub-gap optical absorption in oxygen deficiency defects. We analyze the basis of photoconductivity in AOSs, explained in terms of the extended electron lifetime due to retarded recombination as a result of hole localization. Also, photoconductive gain in AOS photo-TFTs can be maximized by reducing the transit time associated with short channel lengths, making device scaling favourable for high sensitivity operation. © 2012 IEEE.