Correlation between density of states distributions and the fermi level position in interfacial regions of amorphous silicon thin film transistors

This paper investigates the variation of the integrated density of states with conduction activation energy in hydrogenated amorphous silicon thin film transistors. Results are given for two different gate insulator layers, PECVD silicon oxide and thermally grown silicon dioxide. The different gate insulators produce transistors with very different initial transfer characteristics, but the variation of integrated density of states with conduction activation energy is shown to be similar.

MOS and bipolar gated thyristor: A thyristor with IGBT switching characteristics

The IGBT has become the device of choice in many high-voltage-power electronic applications, by virtue of combining the ease of MOS gate control with an acceptable forward voltage drop. However, designers have retained an interest in MOS gated thyristor structures which have a turn-off capability. These offer low on-state losses as a result of their latching behaviour. Recently, there have been various proposals for dual-gate devices that have a thyristor on-state with IGBT-like switching. Many of these dual gated structures rely on advanced MOS technology, with inherent manufacturing difficulties. The MOS and bipolar gated thyristor offers all the advantages of dual gated performance, while employing standard IGBT processing techniques. The paper describes the MBGT in detail, and presents experimental and simulation results for devices based on realistic commercial processes. It is shown that the MBGT represents a viable power semiconductor device technology, suitable for a diverse range of applications. © IEE, 1998.

Amorphous carbon for use in thin film transistors

Tetrahedrally bonded amorphous carbon (ta-C) is a new type of semiconducting thin film material. It can be produced at room temperature using the Filtered Cathodic Vacuum Arc technique. The as-grown undoped ta-C is p-type in nature but it can be n-doped by the addition of nitrogen during deposition. This paper will describe thin film transistor design and fabrication using ta-C as the active channel layer.

Hydrogenated amorphous silicon and silicon nitride deposited at less than 100° C by ECR-PECVD for thin film transistors

A systematic study has been made of the growth of both hydrogenated amorphous silicon (a-Si:H) and silicon nitride (a-SiN) by electron cyclotron resonance plasma enhanced chemical vapour deposition (ECR-PECVD). In the case of a-SiN, helium and nitrogen gas is injected into the system such that it passes through the resonance zone. These highly ionised gases provide sufficient energy to ionise the silane gas, which is injected further downstream. It is demonstrated that a gas phase reaction occurs between the silane and nitrogen species. It is control of the ratio of silane to nitrogen in the plasma which is critical for the production of stoichiometric a-SiN. Material has been produced at 80°C with a Si:N ratio of 1:1.3 a breakdown strength of ∼6 MV cm-1 and resistivity of > 1014 Ω cm. In the case of a-Si:H, helium and hydrogen gas is injected into the ECR zone and silane is injected downstream. It is shown that control of the gas phase reactions is critical in this process also. a-Si:H has been deposited at 80 °C with a dark conductivity of 10-11 Ω-1 cm-1 and a photosensitivity of justbelowl 4×104. Such materials are suitable for use in thin film transistors on plastic substrates.

Characterization of defect removal in hydrogenated and deuterated amorphous silicon thin film transistors

Thin film transistors (TFTs) utilizing an hydrogenated amorphous silicon (a-Si:H) channel layer exhibit a shift in the threshold voltage with time under the application of a gate bias voltage due to the creation of metastable defects. These defects are removed by annealing the device with zero gate bias applied. The defect removal process can be characterized by a thermalization energy which is, in turn, dependent upon an attempt-to-escape frequency for defect removal. The threshold voltage of both hydrogenated and deuterated amorphous silicon (a-Si:D) TFTs has been measured as a function of annealing time and temperature. Using a molecular dynamics simulation of hydrogen and deuterium in a silicon network in the H2 * configuration, it is shown that the experimental results are consistent with an attempt-to-escape frequency of (4.4 ± 0.3) × 1013 Hz and (5.7 ± 0.3) × 1013 Hz for a-Si:H and a-Si:D respectively which is attributed to the oscillation of the Si-H and Si-D bonds. Using this approach, it becomes possible to describe defect removal in hydrogenated and deuterated material by the thermalization energies of (1.552 ± 0.003) eV and (1.559 ± 0.003) eV respectively. This correlates with the energy per atom of the Si-H and Si-D bonds. © 2006 Elsevier B.V. All rights reserved.

How to achieve high mobility thin film transistors by direct deposition of silicon using 13.56 MHz RF PECVD?

CMOS nanocrystalline silicon thin film transistors with high field effect mobility are reported. The transistors were directly deposited by radio-frequency plasma enhanced chemical vapor deposition at 150°C The transistors show maximum field effect mobility of 450 cm2/V-s for electrons and 100 cm2/V-s for holes at room temperature. We attribute the high mobilities to a reduction of the oxygen content, which acts as an accidental donor. Indeed, secondary ion mass spectrometry measurements show that the impurity concentration in the nanocrystalline Si layer is comparable to, or lower than, the defect density in the material, which is already low thanks to hydrogen passivation.

Erratum: "Zinc oxide nanostructures and high electron mobility nanocomposite thin film transistors" (IEEE Transactions on Electron Devices (2009))

In the above entitled paper (ibid., vol. 55, no. 11, pp. 3001-3011), two errors were noticed after the paper went to press. The errors are corrected here.

Self-aligned high-resolution printed polymer transistors

A process to fabricate solution-processable thin-film transistors (TFTs) with a one-step self-aligned definition of the dimensions in all functional layers is demonstrated. The TFT-channel, semiconductor materials, and effective gate dimention of different layers are determined by a one-step imprint process and the subsequent pattern transfer without the need for multiple patterning and mask alignment. The process is compatible with fabrication of large-scale circuits. Copyright © 2011 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.