163 resultados para Voltage loops


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The Brushless Doubly-Fed Induction Generator (BDFIG) shows commercial promise as replacement for doublyfed slip-ring generators for wind power applications by offering reduced capital and operational costs due to its brushless operation. In order to facilitate its commercial deployment, the capabilities of the BDFIG system to comply with grid code requirements have to be assessed. This paper, for the first time, studies the performance of the BDFIG under grid fault ride-through and presents the dynamic behaviour of the machine during three-phase symmetrical voltage dips. Both full and partial voltage dips are studied using a vector model. Simulation and experimental results are provided for a 180 frame BDFIG.

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The paper presents a vector model for a Brushless Doubly-Fed Machine (BDFM). The BDFM has 4 and 8 pole stator windings and a nested-loop rotor cage. The rotor cage has six nests equally spaced around the circumference and each nest comprises three loops. All the rotor loops are short circuited via a common end-ring at one end. The vector model is derived based on the electrical equations of the machine and appropriate vector transformations. In contrast to the stator, there is no three phase circuit in the rotor. Therefore, the vector transformations suitable for three phase circuits can not be utilised for the rotor circuit. A new vector transformation is employed for the rotor circuit quantities. The approach presented in this paper can be extended for a BDFM with any stator poles combination and any number of loops per nest. Simulation results from the model implemented in Simulink are presented. © 2008 IEEE.

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Avalanche multiplication has been one of the major destructive failure mechanisms in IGBTs; in order to avoid operating an IGBT under abnormal conditions, it is desirable to develop peripheral protecting circuits monolithically integrated without compromising the operation and performance of the IGBT. In this paper, a monolithically integrated avalanche diode (D av) for 600V Trench IGBT over-voltage protection is proposed. The mix-mode transient simulation proves the clamping capability of the D av when the IGBT is experiencing over-voltage stress in unclamped inductive switching (UIS) test. The spread of avalanche energy, which prevents hot-spot formation, through the help of the avalanche diode feeding back a large fraction of the avalanche current to a gate resistance (R G) is also explained. © 2011 IEEE.

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In this paper an Active Voltage Control (AVC) technique is presented, for series connection of insulated-gate-bipolar-transistors (IGBT) and control of diode recovery. The AVC technique can control the switching trajectory of an IGBT according to a pre-set reference signal. In series connections, every series connected IGBT follows the reference and so that the dynamic voltage sharing is achieved. For the static voltage balancing, the AVC technique can clamp the highest collector-to-emitter voltage to a pre-set clamping voltage level. By selecting the value of the clamping voltage, the difference among series connected IGBTs can be controlled in an accepted range. Another key advantage for AVC is that by changing the reference signal at turn-on, the diode recovery can be optimized. © 2011 EPE Association - European Power Electr.

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A voltage sensing buck converter-based technique for maximum solar power delivery to a load is presented. While retaining the features and advantages of the incremental conductance algorithm, this technique is more desirable because of single sensor use. The technique operates by maximising power at the buck converter output instead of the input.

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Compact fluorescent lamps (CFLs) incorporating electronic ballasts are widely used in lighting. In many cases, the ability to dim the lamp is a requirement. Dimming can be achieved by varying the switching frequency of the inverter or by changing the voltage supplied to the inverter. The effect of dimming by both approaches on the power losses in the inverter is studied in this work. The lamp and associated inverter has been modeled in Pspice, using a behavioral model for the CFL. Predicted losses are in good agreement with experimental data obtained from calorimetry. After verification, the model was then used to determine the distribution of losses within the inverter, enabling a comparison of the effects of the two dimming methods to be made. © 2011 IEEE.

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An analytical model for the electric field and the breakdown voltage (BV) of an unbalanced superjunction (SJ) device is presented in this paper. The analytical technique uses a superposition approach treating the asymmetric charge in the pillars as an excess charge component superimposed on a balanced charge component. The proposed double-exponentialmodel is able to accurately predict the electric field and the BV for unbalanced SJ devices in both punch through and non punch through conditions. The model is also reasonably accurate at extremely high levels of charge imbalance when the devices behave similarly to a PiN diode or to a high-conductance layer. The analytical model is compared against numerical simulations of charge unbalanced SJ devices and against experimental results. © 2009 IEEE.

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The Brushless Doubly-Fed Induction Generator (BDFIG) shows commercial promise for wind power generation due to its lower cost and higher reliability compared to the Doubly-Fed Induction Generator (DFIG). For the purposes of commercialisation, the BDFIG must meet grid codes at all times. Nowadays, all new wind generators have to ride through certain grid faults, and the Low-Voltage Ride Through (LVRT) capability has become one of the most important points on which to assess the performance a generator. This paper, for the first time, proposes a control scheme to enable the the BDFIG to ride through symmetrical voltage dips. Simulation results and experimental results on a prototype BDFIG show that the proposed scheme gives the capability to ride through low voltage faults. © 2011 IEEE.

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An advanced 700V Smart Trench IGBT with monolithically integrated over-voltage and over-current protecting circuits is presented in this paper. The proposed Smart IGBT comprises a sense IGBT, a low voltage lateral n-channel MOSFET (M 1), an avalanche diode (D av), and poly-crystalline Zener diodes (ZD) and resistor (R poly). Mix-mode transient simulations with MEDICI have proven the functionalities of the protecting circuits when the device is operating under abnormal conditions, such as Unclamped Inductive Switching (UIS) and Short Circuit (SC) condition. A Trench IGBT process is used to fabricate this device with total 11 masks including one metal mask only. The characterizations of the fabricated device exhibit the clamping capability of the avalanche diode and voltage pull-down ability of the MOSFET. © 2012 IEEE.

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This paper demonstrates and discusses novel "three dimensional" silicon based junction isolation/termination solutions suitable for high density ultra-low-resistance Lateral Super-Junction structures. The proposed designs are both compact and effective in safely distributing the electrostatic potential away from the active device area. The designs are based on the utilization of existing layers in the device fabrication line, hence resulting in no extra complexity or cost increase. The study/demonstration is done through extensive experimental measurements and numerical simulations. © 2012 IEEE.

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The Tandem PiN Schottky (TPS) rectifier features lowly-doped p-layers in both active and termination regions, and is applied in 600-V rating for the first time. In the active region, the Schottky contact is in series connection with a transparent p-layer, leading to a superior forward performance than the conventional diodes. In addition, due to the benefit of moderate hole injection from the p-layer, the TPS offers a better trade-off between the on-state voltage and the switching speed. The active p-layer also helps to stabilise the Schottky contact, and hence the electrical data distributions are more concentrated. Regarding the floating p-layer in the termination region, its purpose is to reduce the peak electric fields, and the TPS demonstrates a high breakdown voltage with a compact termination width, less than 70% of the state-of-the-art devices on the market. Experimental results have shown that the 600-V TPS rectifier has an ultra-low on-state voltage of 0.98 V at 250 A/cm 2, a fast turn-off time of 75 ns by the standard RG1 test (I F=0.5A, I R=1A, and I RR=0.25A) and a breakdown voltage over 720 V. It is noteworthy that the p-layers in the active and termination regions can be formed at no extra cost for the use of self-alignment process. © 2012 IEEE.