Numerical analysis of the current and voltage sharing issues for resistive fault current limiter using YBCO coated conductors

YBaCuO-coated conductors offer great potential in terms of performance and cost-saving for superconducting fault current limiter (SFCL). A resistive SFCL based on coated conductors can be made from several tapes connected in parallel or in series. Ideally, the current and voltage are shared uniformly by the tapes when quench occurs. However, due to the non-uniformity of property of the tapes and the relative positions of the tapes, the currents and the voltages of the tapes are different. In this paper, a numerical model is developed to investigate the current and voltage sharing problem for the resistive SFCL. This model is able to simulate the dynamic response of YBCO tapes in normal and quench conditions. Firstly, four tapes with different Jc 's and n values in E-J power law are connected in parallel to carry the fault current. The model demonstrates how the currents are distributed among the four tapes. These four tapes are then connected in series to withstand the line voltage. In this case, the model investigates the voltage sharing between the tapes. Several factors that would affect the process of quenches are discussed including the field dependency of Jc, the magnetic coupling between the tapes and the relative positions of the tapes. © 2010 IEEE.

Voltage programmable dual-band bandpass/bandstop filter response in a single micro-electro-mechanical device

This paper reports on a switchable multi-band filter response achieved within a single micro-electro-mechanical device. A prototype device fabricated in a SOI process demonstrates a voltage programmable and tunable, dual-band, band-pass/band-stop response. Both analytical and finite element models are introduced in this paper to elucidate the operating principle of the filter and to guide filter design. Voltage programmability of the filter characteristic is demonstrated with the ability to independently tune the centre frequency and bandwidth for each band. A representative measurement shows that the minimum 3 dB-bandwidth (BW) is 155 Hz, 140Hz, and 20 dB-BW is 216 Hz, 203Hz for the upper-band and lower-band center frequencies located at 131.5 kHz and 130.7 kHz, respectively. © 2011 IEEE.

A study of capacitance-voltage characteristics of lead zirconate titanate ferroelectric thin films and their usage to investigate polarization and coercive field.

Capacitance-voltage (C-V) characteristics of lead zirconate titanate (PZT) thin films with a thickness of 130 nm were measured between 300 and 533 K. The transition between ferroelectric and paraelectric phases was revealed to be of second order in our case, with a Curie temperature at around 450 K. A linear relationship was found between the measured capacitance and the inverse square root of the applied voltage. It was shown that such a relationship could be fitted well by a universal expression of C/A = k(V+V(0))(-1/2) and that this expression could be derived by expanding the Landau-Devonshire free energy at an effective equilibrium position of the Ti/Zr ion in a PZT unit cell. By using the derived equations in this work, the free energy parameters for an individual material can be obtained solely from the corresponding C-V data, and the temperature dependences of both remnant polarization and coercive voltage are shown to be in quantitative agreement with the experimental data.

Metastability mechanisms in thin film transistors quantitatively resolved using post-stress relaxation of threshold voltage

A new approach is presented to resolve bias-induced metastability mechanisms in hydrogenated amorphous silicon (a-Si:H) thin film transistors (TFTs). The post stress relaxation of threshold voltage (V(T)) was employed to quantitatively distinguish between the charge trapping process in gate dielectric and defect state creation in active layer of transistor. The kinetics of the charge de-trapping from the SiN traps is analytically modeled and a Gaussian distribution of gap states is extracted for the SiN. Indeed, the relaxation in V(T) is in good agreement with the theory underlying the kinetics of charge de-trapping from gate dielectric. For the TFTs used in this work, the charge trapping in the SiN gate dielectric is shown to be the dominant metastability mechanism even at bias stress levels as low as 10 V.

Dynamic analysis of the brushless doubly-fed induction generator during symmetrical three-phase voltage dips

The Brushless Doubly-Fed Induction Generator (BDFIG) shows commercial promise as replacement for doublyfed slip-ring generators for wind power applications by offering reduced capital and operational costs due to its brushless operation. In order to facilitate its commercial deployment, the capabilities of the BDFIG system to comply with grid code requirements have to be assessed. This paper, for the first time, studies the performance of the BDFIG under grid fault ride-through and presents the dynamic behaviour of the machine during three-phase symmetrical voltage dips. Both full and partial voltage dips are studied using a vector model. Simulation and experimental results are provided for a 180 frame BDFIG.

Integrated avalanche diode for 600 v Trench IGBT over-voltage protection

Avalanche multiplication has been one of the major destructive failure mechanisms in IGBTs; in order to avoid operating an IGBT under abnormal conditions, it is desirable to develop peripheral protecting circuits monolithically integrated without compromising the operation and performance of the IGBT. In this paper, a monolithically integrated avalanche diode (D av) for 600V Trench IGBT over-voltage protection is proposed. The mix-mode transient simulation proves the clamping capability of the D av when the IGBT is experiencing over-voltage stress in unclamped inductive switching (UIS) test. The spread of avalanche energy, which prevents hot-spot formation, through the help of the avalanche diode feeding back a large fraction of the avalanche current to a gate resistance (R G) is also explained. © 2011 IEEE.

Voltage sensing buck converter-based technique for maximum photovoltaic solar energy delivery

A voltage sensing buck converter-based technique for maximum solar power delivery to a load is presented. While retaining the features and advantages of the incremental conductance algorithm, this technique is more desirable because of single sensor use. The technique operates by maximising power at the buck converter output instead of the input.