134 resultados para Soi


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This paper details a bulk acoustic mode resonator fabricated in single-crystal silicon with a quality factor of 15 000 in air, and over a million below 10 mTorr at a resonant frequency of 2.18 MHz. The resonator is a square plate that is excited in the square-extensional mode and has been fabricated in a commercial foundry silicon-on-insulator (SOI) MEMS process through MEMSCAP. This paper also presents a simple method of extracting resonator parameters from raw measurements heavily buried in electrical feedthrough. Its accuracy has been demonstrated through a comparison between extracted motional resistance values measured at different voltage biases and those predicted from an analytical model. Finally, a method of substantially cancelling electrical feedthrough through system-level electronic implementation is also introduced. © 2008 IOP Publishing Ltd.

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This paper reports the design and electrical characterization of a micromechanical disk resonator fabricated in single crystal silicon using a foundry SOI micromachining process. The microresonator has been selectively excited in the radial extensional and the wine glass modes by reversing the polarity of the DC bias voltage applied on selected drive electrodes around the resonant structure. The quality factor of the resonator vibrating in the radial contour mode was 8000 at a resonant frequency of 6.34 MHz at pressure below 10 mTorr vacuum. The highest measured quality factor of the resonator in the wine glass resonant mode was 1.9 × 106 using a DC bias voltage of 20 V at about the same pressure in vacuum; the resonant frequency was 5.43 MHz and the lowest motional resistance measured was approximately 17 kΩ using a DC bias voltage of 60 V applied across 2.7 μm actuation gaps. This corresponds to a resonant frequency-quality factor (f-Q) product of 1.02 × 1013, among the highest reported for single crystal silicon microresonators, and on par with the best quartz crystal resonators. The quality factor for the wine glass mode in air was approximately 10,000. © 2009 Elsevier B.V. All rights reserved.

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This paper presents a method for fast and accurate determination of parameters relevant to the characterization of capacitive MEMS resonators like quality factor (Q), resonant frequency (fn), and equivalent circuit parameters such as the motional capacitance (Cm). In the presence of a parasitic feedthrough capacitor (CF) appearing across the input and output ports, the transmission characteristic is marked by two resonances: series (S) and parallel (P). Close approximations of these circuit parameters are obtained without having to first de-embed the resonator motional current typically buried in feedthrough by using the series and parallel resonances. While previous methods with the same objective are well known, we show that these are limited to the condition where CF ≪ CmQ. In contrast, this work focuses on moderate capacitive feedthrough levels where CF > CmQ, which are more common in MEMS resonators. The method is applied to data obtained from the measured electrical transmission of fabricated SOI MEMS resonators. Parameter values deduced via direct extraction are then compared against those obtained by a full extraction procedure where de-embedding is first performed and followed by a Lorentzian fit to the data based on the classical transfer function associated with a generic LRC series resonant circuit. © 2011 Elsevier B.V. All rights reserved.

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An ingenious new CMOS-compatible process which promises to significantly improve the performance of power devices is discussed. A novel power device concept based on the use of high voltage regions suspended on thin semiconductor/dielectric membranes is reported. The membrane power devices are manufactured in a fully-CMOS compatible silicon-on-insulator (SOI) process followed by a bulk etching step and subsequent back-passivation. The concept is applicable to a class of high voltage devices such as LDMOSFETs, diodes, LIGBTs and superjunctions.

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The direct deposition of carbon nanotubes on CMOS microhotplates is demonstrated in this paper. Tungsten microhotplates, fabricated on thin SOI membranes aside CMOS control circuitry, are used to locally grow carbon nanotubes by chemical vapour deposition. Unlike bulk heating of the entire chip, which could cause degradation to CMOS devices and interconnects due to high growth temperatures in excess of 500 °C, this novel technique allows carbon nanotubes to be grown on-chip in localized regions. The microfabricated heaters are thermally isolated from the rest of the CMOS chip as they are on the membranes. This allows carbon nanotubes to be grown alongside CMOS circuitry on the same wafer without any external heating, thus enabling new applications (e.g. smart gas sensing) where the integration of CMOS and carbon nanotubes is required.

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This paper describes the growth of Carbon Nanotubes (CNTs) both aligned and non-aligned on fully processed CMOS substrates containing high temperature tungsten metallization. While the growth method has been demonstrated in fabricating CNT gas sensitive layers for high temperatures SOI CMOS sensors, it can be employed in a variety of applications which require the use of CNTs or other nanomaterials with CMOS electronics. In our experiments we have grown CNTs both on SOI CMOS substrates and SOI CMOS microhotplates (suspended on membranes formed by post-CMOS deep RIE etching). The fully processed SOI substrates contain CMOS devices and circuits and additionally, some wafers contained high current LDMOSFETs and bipolar structures such as Lateral Insulated Gate Bipolar Transistors. All these devices were used as test structures to investigate the effect of additional post-CMOS processing such as CNT growth, membrane formation, high temperature annealing, etc. Electrical characterisation of the devices with CNTs were performed along with SEM and Raman spectroscopy. The CNTs were grown both at low and high temperatures, the former being compatible with Aluminium metallization while the latter being possible through the use of the high temperature CMOS metallization (Tungsten). In both cases we have found that there is no change in the electrical behaviour of the CMOS devices, circuits or the high current devices. A slight degradation of the thermal performance of the CMOS microhotplates was observed due to the extra heat dissipation path created by the CNT layers, but this is expected as CNTs exhibit a high thermal conductance. In addition we also observed that in the case of high temperature CNT growth a slight degradation in the manufacturing yield was observed. This is especially the case where large area membranes with a diameter in excess of 500 microns are used.

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It has been shown that the apparent benefits of a two-layer stacked SOI system, i.e. packing density and speed improvements, are less than could be expected in the context of a VLSI requirement [1]. In this project the stacked SOI system has been identified as having major application in the realization of integrated, mixed technology systems. Zone-melting-recrystallization (ZMR) with lasers and electron beams have been used to produce device quality SOI material and a small test-bed circuit has been designed as a demonstration of the feasibility of this approach. © 1988.

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Lateral insulated gate bipolar transistors (LIGBTs) in silicon-on-insulator (SOI) show a unique turn off characteristic when compared to junction-isolated RESURF LIGBTs or vertical IGBTs. The turn off characteristic shows an extended `terrace' where, after the initial fast transient characteristic of IGBTs due to the loss of the electron current, the current stays almost at the same value for an extended period of time, before suddenly dropping to zero. In this paper, we show that this terrace arises because there is a value of LIGBT current during switch off where the rate of expansion of the depletion region with respect to the anode current is infinite. Once this level of anode current is approached, the depletion region starts to expand very rapidly, and is only stopped when it reaches the n-type buffer layer surrounding the anode. Once this happens, the current rapidly drops to zero. A quasi-static analytic model is derived to explain this behaviour. The analytically modelled turn off characteristic agrees well with that found by numerical simulation.

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We report a technique which can be used to improve the accuracy of infrared (IR) surface temperature measurements made on MEMS (Micro-Electro-Mechanical- Systems) devices. The technique was used to thermally characterize a SOI (Silicon-On-Insulator) CMOS (Complementary Metal Oxide Semiconductor) MEMS thermal flow sensor. Conventional IR temperature measurements made on the sensor were shown to give significant surface temperature errors, due to the optical transparency of the SiO 2 membrane layers and low emissivity/high reflectivity of the metal. By making IR measurements on radiative carbon micro-particles placed in isothermal contact with the device, the accuracy of the surface temperature measurement was significantly improved. © 2010 EDA Publishing/THERMINIC.

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This paper reports on a switchable multi-band filter response achieved within a single micro-electro-mechanical device. A prototype device fabricated in a SOI process demonstrates a voltage programmable and tunable, dual-band, band-pass/band-stop response. Both analytical and finite element models are introduced in this paper to elucidate the operating principle of the filter and to guide filter design. Voltage programmability of the filter characteristic is demonstrated with the ability to independently tune the centre frequency and bandwidth for each band. A representative measurement shows that the minimum 3 dB-bandwidth (BW) is 155 Hz, 140Hz, and 20 dB-BW is 216 Hz, 203Hz for the upper-band and lower-band center frequencies located at 131.5 kHz and 130.7 kHz, respectively. © 2011 IEEE.

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We investigate the electrical properties of silicon-on-insulator (SOI) photonic crystals as a function of both doping level and air filling factor. The resistance trends can be clearly explained by the presence of a depletion region around the sidewalls of the holes that is caused by band pinning at the surface. To understand the trade-off between the carrier transport and the optical losses due to free electrons in the doped SOI, we also measured the resonant modes of L3 photonic crystal nanocavities and found that surprisingly high doping levels, up to 1018 / cm3, are acceptable for practical devices with Q factors as high as 4× 104. © 2011 American Institute of Physics.

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We present experimental measurements on Silicon-on-insulator (SOI) photonic crystal slabs with an active layer containing Er3+ ions-doped Silicon nanoclusters (Si-nc), showing strong enhancement of 1.54 μm emission at room temperature. We provide a systematic theoretical analysis to interpret such results. In order to get further insight, we discuss experimental data on the guided luminescence of unpatterned SOI planar slot waveguides, which show enhanced light emission in transverse-magnetic (TM) modes over transverse-electric (TE) ones. ©2007 IEEE.

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This paper presents for the first time the performance of a silicon-on-insulator (SOI) p-n thermodiode, which can operate in an extremely wide temperature range of 200°C to 700°C while maintaining its linearity. The thermodiode is embedded in a thin dielectric membrane underneath a tungsten microheater, which allows the diode characterization at very high temperature (> 800°C). The effect of the junction area (Aj) on the thermodiode linearity, sensitivity and self-heating is experimentally and theoretically investigated. Results on the long-term diode stability at high temperature are also reported. © 2013 IEEE.

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Non-dispersive-infra-red (NDIR) sensors are believed to be one of the most selective and robust solutions for CO2 detection, though cost prohibits their broader integration. In this paper we propose a commercially viable silicon-on-insulator (SOI) complementary metal-oxide (CMOS) micro-electro-mechanical (MEMS) technology for an IR thermal emitter. For the first time, vertically aligned multi walled carbon nanotubes (VA-MWCNTs) are suggested as a possible coating for the enhancement of the emission intensity of the optical source of a NDIR system. VA-MWCNTs have been grown in situ by chemical vapour deposition (CVD) exclusively on the heater area. Optical microscopy, scanning electron microscopy and Raman spectroscopy have been used to verify the quality of the VA-MWCNTs growth. The CNT-coated emitter demonstrated an increased response to CO2 of approx. 60%. Furthermore, we show that the VA-MWCNTs are stable up to temperatures of 500°C for up to 100 hours. © 2013 IEEE.