160 resultados para Voltage ripples


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Problem of DC link size in a stiff voltage-source inverter for electric drive is described in the paper. Advantages of advanced film capacitor technology over conventional one for DC link application are reviewed. Conventional DC link capacitor selection methods are questioned in view of advanced capacitor technology utilization in stiff voltage-source inverter. For capacitor selection maximum ripple rms current point is shown. DC link ripple current spectrum analysis under modern PWM techniques is presented. Some capacitor selection recommendations are given. The analysis has been aided greatly by computer modeling in PSpice. ©2005 IEEE.

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Compact Fluorescent Lamps (CFL) incorporating electronic ballasts are widely used in lighting. In many cases the ability to dim the lamp is a requirement Dimming can be achieved by varying the voltage supplied to the inverter or by changing the switching frequency of the inverter. The effect of dimming by both approaches on the power losses in the inverter is studied in this work. The lamp and associated inverter has been modeled in PSPICE, using a behavioral model for the CFL. Predicted losses are in good agreement with experimental data obtained from calorimetry. The model was then used to determine the distribution of losses within the inverter, enabling a comparison of the effects of the two dimming methods to be made. © 2006 IEEE.

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In this paper an Active Voltage Control (AVC) technique is presented, for series connection of insulated-gate-bipolar-transistors (IGBT) and control of diode recovery. The AVC technique can control the switching trajectory of an IGBT according to a pre-set reference signal. In series connections, every series connected IGBT follows the reference and so that the dynamic voltage sharing is achieved. Another key advantage for AVC is that by changing the reference signal at turn-on, the diode recovery can be optimised. © 2010 IEEE.

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In this paper the soft turn-on of NPT IGBT under Active Voltage Control (AVC) is presented. The AVC technique is able to control the IGBT switching trajectory according to a pre-defined reference signal generated by a FPGA chip. By applying a special designed reference signal at turn-on, the IGBT turn-on current overshoot and diode recovery can be optimized. Experiments of soft turn-on with different reference signal are presented in this paper. This technique can be used to reduce the switching stress on the device and on other components of the circuit. © 2011 IEEE.

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YBaCuO-coated conductors offer great potential in terms of performance and cost-saving for superconducting fault current limiter (SFCL). A resistive SFCL based on coated conductors can be made from several tapes connected in parallel or in series. Ideally, the current and voltage are shared uniformly by the tapes when quench occurs. However, due to the non-uniformity of property of the tapes and the relative positions of the tapes, the currents and the voltages of the tapes are different. In this paper, a numerical model is developed to investigate the current and voltage sharing problem for the resistive SFCL. This model is able to simulate the dynamic response of YBCO tapes in normal and quench conditions. Firstly, four tapes with different Jc 's and n values in E-J power law are connected in parallel to carry the fault current. The model demonstrates how the currents are distributed among the four tapes. These four tapes are then connected in series to withstand the line voltage. In this case, the model investigates the voltage sharing between the tapes. Several factors that would affect the process of quenches are discussed including the field dependency of Jc, the magnetic coupling between the tapes and the relative positions of the tapes. © 2010 IEEE.

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This paper reports on a switchable multi-band filter response achieved within a single micro-electro-mechanical device. A prototype device fabricated in a SOI process demonstrates a voltage programmable and tunable, dual-band, band-pass/band-stop response. Both analytical and finite element models are introduced in this paper to elucidate the operating principle of the filter and to guide filter design. Voltage programmability of the filter characteristic is demonstrated with the ability to independently tune the centre frequency and bandwidth for each band. A representative measurement shows that the minimum 3 dB-bandwidth (BW) is 155 Hz, 140Hz, and 20 dB-BW is 216 Hz, 203Hz for the upper-band and lower-band center frequencies located at 131.5 kHz and 130.7 kHz, respectively. © 2011 IEEE.

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Capacitance-voltage (C-V) characteristics of lead zirconate titanate (PZT) thin films with a thickness of 130 nm were measured between 300 and 533 K. The transition between ferroelectric and paraelectric phases was revealed to be of second order in our case, with a Curie temperature at around 450 K. A linear relationship was found between the measured capacitance and the inverse square root of the applied voltage. It was shown that such a relationship could be fitted well by a universal expression of C/A = k(V+V(0))(-1/2) and that this expression could be derived by expanding the Landau-Devonshire free energy at an effective equilibrium position of the Ti/Zr ion in a PZT unit cell. By using the derived equations in this work, the free energy parameters for an individual material can be obtained solely from the corresponding C-V data, and the temperature dependences of both remnant polarization and coercive voltage are shown to be in quantitative agreement with the experimental data.

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A new approach is presented to resolve bias-induced metastability mechanisms in hydrogenated amorphous silicon (a-Si:H) thin film transistors (TFTs). The post stress relaxation of threshold voltage (V(T)) was employed to quantitatively distinguish between the charge trapping process in gate dielectric and defect state creation in active layer of transistor. The kinetics of the charge de-trapping from the SiN traps is analytically modeled and a Gaussian distribution of gap states is extracted for the SiN. Indeed, the relaxation in V(T) is in good agreement with the theory underlying the kinetics of charge de-trapping from gate dielectric. For the TFTs used in this work, the charge trapping in the SiN gate dielectric is shown to be the dominant metastability mechanism even at bias stress levels as low as 10 V.