148 resultados para CMOS
Resumo:
Ni silicides used as contacts in source/drain and gate of advanced CMOS devices were analyzed by atom probe tomography (APT) at atomic scale. These measurements were performed on 45 nm nMOS after standard self-aligned silicide (salicide) process using Ni(5 at.% Pt) alloy. After the first annealing (RTA1), δ-Ni2Si was the only phase formed on gate and source/drain while, after the second annealing (RTA2), two different Ni silicides have been formed: NiSi on the gate and δ-Ni2Si on the source and drain. This difference between source/drain and gate regions in nMOS devices has been related to the Si substrate nature (poly or mono-crystalline) and to the size of the contact. In fact, NiSi seems to have difficulties to nucleate in the narrow source/drain contact on mono-crystalline Si. The results have been compared to analysis performed on 28 nm nMOS where the Pt concentration is higher (10 at.% Pt). In this case, θ-Ni2Si is the first phase to form after RTA1 and NiSi is then formed at the same time on source (or drain) and gate after RTA2. The absence of the formation of NiSi from δ-Ni 2Si/Si(1 0 0) interface compared to θ-Ni2Si/Si(1 0 0) interface could be related to the difference of the interface energies. The redistributions of As and Pt in different silicides and interfaces were measured and discussed. In particular, it has been evidenced that Pt redistributions obtained on both 45 and 28 nm MOS transistors correspond to respective Pt distributions measured on blanket wafers. © 2013 Elsevier B.V. All rights reserved.
Resumo:
3D thermo-electro-mechanical device simulations are presented of a novel fully CMOS-compatible MOSFET gas sensor operating in a SOI membrane. A comprehensive stress analysis of a Si-SiO2-based multilayer membrane has been performed to ensure a high degree of mechanical reliability at a high operating temperature (e.g. up to 400°C). Moreover, optimisation of the layout dimensions of the SOI membrane, in particular the aspect ratio between the membrane length and membrane thickness, has been carried out to find the best trade-off between minimal device power consumption and acceptable mechanical stress.
Resumo:
This paper reports the fabrication and electrical characterization of high tuning range AlSi RF MEMS capacitors. We present experimental results obtained by a surface micromachining process that uses dry etching of sacrificial amorphous silicon to release Al-1%Si membranes and has a low thermal budget (<450 °C) being compatible with CMOS post-processing. The proposed silicon sacrificial layer dry etching (SSLDE) process is able to provide very high Si etch rates (3-15 μm/min, depending on process parameters) with high Si: SiO2 selectivity (>10,000:1). Single- and double-air-gap MEMS capacitors, as well as some dedicated test structures needed to calibrate the electro-mechanical parameters and explore the reliability of the proposed technology, have been fabricated with the new process. S-parameter measurements from 100 MHz up to 2 GHz have shown a capacitance tuning range higher than 100% with the double-air-gap architecture. The tuning range can be enlarged with a proper DC electrical bias of the capacitor electrodes. Finally, the reported results make the proposed MEMS tuneable capacitor a good candidate for above-IC integration in communications applications. © 2004 Elsevier B.V. All rights reserved.
Resumo:
This paper details the design and enhanced electrical transduction of a bulk acoustic mode resonator fabricated in a commercial foundry MEMS process utilizing 2.5 μm gaps. The I-V characteristics of electrically addressed silicon resonators are often dominated by capacitive parasitics, inherent to hybrid technologies. This paper benchmarks a variety of drive and detection principles for electrostatically driven square-extensional mode resonators operating in air via analytical models accompanied by measurements of fabricated devices with the primary aim of enhancing the ratio of the motional to feedthrough current at nominal operating voltages. In view of ultimately enhancing the motional to feedthrough current ratio, a new detection technique that combines second harmonic capacitive actuation and piezoresistive detection is presented herein. This new method is shown to outperform previously reported methods utilizing voltages as low as ±3 V in air, providing a promising solution for low voltage CMOS-MEMS integration. To elucidate the basis of this improvement in signal output from measured devices, an approximate analytical model for piezoresistive sensing specific to the resonator topology reported here is also developed and presented. © 2010 Elsevier B.V. All rights reserved.
Resumo:
Electrically addressed silicon bulk acoustic wave microresonators offer high Q solutions for applications in sensing and signal processing. However, the electrically transduced motional signal is often swamped by parasitic feedthrough in hybrid technologies. With the aim of enhancing the ratio of the motional to feedthrough current at nominal operating voltages, this paper benchmarks a variety of drive and detection principles for electrostatically driven square-extensional mode resonators operating in air and in a foundry MEMS process utilizing 2μm gaps. A new detection technique, combining second harmonic capacitive actuation and piezoresistive detection, outperforms previously reported methods utilizing voltages as low as ± 3V in air providing a promising solution for low voltage CMOS-MEMS integration. ©2009 IEEE.
Resumo:
Abstract-This paper reports a single-crystal silicon mass sensor based on a square-plate resonant structure excited in the wine glass bulk acoustic mode at a resonant frequency of 2.065 MHz and an impressive quality factor of 4 million at 12 mtorr pressure. Mass loading on the resonator results in a linear downshift in the resonant frequency of this device, wherein the measured sensitivity is found to be 175 Hz cm2/μg. The silicon resonator is embedded in an oscillator feedback loop, which has a short-term frequency stability of 3 mHz (approximately 1.5 ppb) at an operating pressure of 3.2 mtorr, corresponding to an equivalent mass noise floor of 17 pg/cm2. Possible applications of this device include thin film monitoring and gas sensing, with the potential added benefits of scalability and integration with CMOS technology. © 2008 IEEE.
Resumo:
A novel CMOS compatible lateral thyristor is proposed in this paper. Its thyristor conduction is fully controlled by a p-MOS gate. Loss of MOS control due to parasitic latch-up has been eliminated and triggering of the main thyristor at lower forward current achieved. The device operation has been verified by 2-D numerical simulations and experimental fabrication.
Resumo:
An ingenious new CMOS-compatible process which promises to significantly improve the performance of power devices is discussed. A novel power device concept based on the use of high voltage regions suspended on thin semiconductor/dielectric membranes is reported. The membrane power devices are manufactured in a fully-CMOS compatible silicon-on-insulator (SOI) process followed by a bulk etching step and subsequent back-passivation. The concept is applicable to a class of high voltage devices such as LDMOSFETs, diodes, LIGBTs and superjunctions.
Resumo:
A 5V/1 V Switched Capacitor (SC) dc-dc converter designed for a 0.18μm CMOS process is analysed in detail, in this paper. Analytical equations are derived for the voltages and currents through the main components of the SC converter. The model includes switches, capacitors, equivalent series resistances and the load. The switches in the converter are represented by MOSFETs in the UMC 0.18μm CMOS process. The impact of system parameters on output voltage ripple are studied using the analytical expressions.
Resumo:
The noble gas sensor using multiple ZnO nanorods was fabricated with CMOS compatible process and sol-gel growth method on selective area and gas response characteristics to NO2 gas of the sensor device were investigated. We confirmed the sensors had high sensitive response denoted by the sensitivity of several tens for NO2 gas sensing and also showed pretty low power consumption close to 20 mW even though the recovery of resistance come up to almost the initial value.