Nanowires for optoelectronic device applications

GaAs and InP based nanowires were grown epitaxially on GaAs or InP (111)B substrates by metalorganic chemical vapor deposition using Au nanoparticles as catalyst. In this paper, we will give an overview of nanowire research activities in our group. In particular, the effects of growth parameters for GaAs and InP nanowires on the crystal quality were studied in detail. We demonstrated the ability to obtain defect-free GaAs nanowires via either two-temperature procedure, or by controlling V/III ratio or growth rate. The crystal structure of InP nanowires, ie, WZ or ZB, can also be engineered by just controlling the V/III ratio. © 2009 Wiley-VCH Verlag GmbH & Co. KGaA.

III-V compound semiconductor nanowires

InP and GaAs based nanowires were grown epitaxially on InP or GaAs (111)B substrates by metalorganic chemical vapor deposition via vapor-liquid-solid (VLS) mechanism. In this report, I will give an overview of nanowire research activities in our group. In particular, the effects of growth parameters for InP and GaAs nanowires on the crystal quality have been studied in detail. We demonstrated the ability to obtain defect-free GaAs nanowires and control the crystal structure of InP nanowires, ie, WZ or ZB, by choosing a combination of growth parameters, such as temperature, V/III ratio and nanowire diameter. © 2009 IEEE NANO Organizers.

III-V compound semiconductor nanowires

GaAs and InP based nanowires were grown epitaxially on GaAs or InP (111)B substrates by metalorganic chemical vapor deposition using Au nanoparticles as catalyst. In this talk, I will give an overview of nanowire research activities in our group. Especially, the effects of growth parameters for GaAs and InP nanowires on the crystal quality have been studied in detail. We demonstrated the ability to obtain defect-free GaAs nanowires and control the crystal structure of InP nanowires, ie, WZ or ZB, by choosing a combination of growth parameters, such as temperature, V/III ratio and nanowire diameter. © 2009 IEEE.

The effect of dislocations on the efficiency of InGaN/GaN solar cells

Two solar cells based on an InGaN/GaN p-i-n hetero-junction, but having different dislocation densities, were fabricated and characterized. The structures were grown on c-plane (0001) GaN-on-sapphire templates with different threading dislocation (TD) densities of 5×108 and 5×109 cm-2. Structural characterization revealed the presence of V-defects in the InGaN epilayer. Since each V-defect was associated with a TD, the structural as well as the optical properties worsened with a higher TD density in the GaN/sapphire template. It was also found that additional dislocations were generated in the p-GaN layer over the V-defects in the InGaN layer. Because of its superior structural quality, the peak external quantum efficiency (EQE) of the low TD density sample was three times higher than that of the high TD density sample. © 2013 Elsevier B.V.

A hybrid density functional view of native vacancies in gallium nitride.

We investigated the transition energy levels of the vacancy defects in gallium nitride by means of a hybrid density functional theory approach (DFT). We show that, in contrast to predictions from a recent study on the level of purely local DFT, the inclusion of screened exchange stabilizes the triply positive charge state of the nitrogen vacancy for Fermi energies close to the valence band. On the other hand, the defect levels associated with the negative charge states of the nitrogen vacancy hybridize with the conduction band and turn out to be energetically unfavorable, except for high n-doping. For the gallium vacancy, the increased magnetic splitting between up-spin and down-spin bands due to stronger exchange interactions in sX-LDA pushes the defect levels deeper into the band gap and significantly increases the associated charge transition levels. Based on these results, we propose the ϵ(0| - 1) transition level as an alternative candidate for the yellow luminescence in GaN.

Low-cost high-efficiency GaN LED on large-area si substrate

The use of large size Si substrates for epitaxy of nitride light emitting diode (LED) structures has attracted great interest because Si wafers are readily available in large diameter at low cost. In addition, such wafers are compatible with existing processing lines for the 6-inch and larger wafer sizes commonly used in the electronics industry. With the development of various methods to avoid wafer cracking and reduce the defect density, the performance of GaN-based LED and electronic devices has been greatly improved. In this paper, we review our methods of growing crack-free InGaN-GaN multiple quantum well (MQW) LED structures of high crystalline quality on Si(111) substrates. The performance of processed LED devices and its dependence on the threading dislocation density were studied. Full wafer-level LED processing using a conventional 6-inch III-V processing line is also presented, demonstrating the great advantage of using large-size Si substrates for mass production of GaN LED devices.

Grain boundary interface mechanics in strain gradient crystal plasticity

Interactions between dislocations and grain boundaries play an important role in the plastic deformation of polycrystalline metals. Capturing accurately the behaviour of these internal interfaces is particularly important for applications where the relative grain boundary fraction is significant, such as ultra fine-grained metals, thin films and microdevices. Incorporating these micro-scale interactions (which are sensitive to a number of dislocation, interface and crystallographic parameters) within a macro-scale crystal plasticity model poses a challenge. The innovative features in the present paper include (i) the formulation of a thermodynamically consistent grain boundary interface model within a microstructurally motivated strain gradient crystal plasticity framework, (ii) the presence of intra-grain slip system coupling through a microstructurally derived internal stress, (iii) the incorporation of inter-grain slip system coupling via an interface energy accounting for both the magnitude and direction of contributions to the residual defect from all slip systems in the two neighbouring grains, and (iv) the numerical implementation of the grain boundary model to directly investigate the influence of the interface constitutive parameters on plastic deformation. The model problem of a bicrystal deforming in plane strain is analysed. The influence of dissipative and energetic interface hardening, grain misorientation, asymmetry in the grain orientations and the grain size are systematically investigated. In each case, the crystal response is compared with reference calculations with grain boundaries that are either 'microhard' (impenetrable to dislocations) or 'microfree' (an infinite dislocation sink). © 2013 Elsevier Ltd. All rights reserved.

Controllable nanodomain defects in ferroelectric/ferroelastic biferroic thin films

Ferroelectric thin films have been intensively studied at the nanometre scale due to the application in many fields, such as non-volatile memories. Enhanced piezo-response force microscopy (E-PFM) was used to investigate the evolution of ferroelectric and ferroelastic nanodomains in a polycrystalline thin film of the simple multi-ferroic PbZr0.3Ti0.7O 3 (PZT). By applying a d.c. voltage between the atomic force microscopy (AFM) tip and the bottom substrate of the sample, we created an electric field to switch the domain orientation. Reversible switching of both ferroelectric and ferroelastic domains towards particular directions with predominantly (111) domain orientations are observed. We also showed that along with the ferroelectric/ferroelastic domain switch, there are defects that also switch. Finally, we proposed the possible explanation of this controllable defect in terms of flexoelectricity and defect pinning. © 2013 IEEE.

Multi-walled carbon nanotube conductivity enhancement and band gap widening via rapid pulsed thermal annealing

Herein we report on the transport characteristics of rapid pulsed vacuum-arc thermally annealed, individual and network multi-walled carbon nanotubes. Substantially reduced defect densities (by at least an order of magnitude), measured by micro-Raman spectroscopy, and were achieved by partial reconstruction of the bamboo-type defects during thermal pulsing compared with more traditional single-pulse thermal annealing. Rapid pulsed annealed processed networks and individual multi-walled nanotubes showed a consistent increase in conductivity (of over a factor of five at room temperature), attributed to the reduced number density of resistive axial interfaces and, in the case of network samples, the possible formation of structural bonds between crossed nanotubes. Compared to the highly defective as-grown nanotubes, the pulsed annealed samples exhibited reduced temperature sensitivity in their transport characteristics signifying the dominance of scattering events from structural defects. Transport measurements in the annealed multi-walled nanotubes deviated from linear Ohmic, typically metallic, behavior to an increasingly semiconducting-like behavior attributed to thermally induced axial strains. Rapid pulsed annealed networks had an estimated band gap of 11.26 meV (as-grown; 6.17 meV), and this observed band gap enhancement was inherently more pronounced for individual nanotubes compared with the networks most likely attributed to mechanical pinning effect of the probing electrodes which possibly amplifies the strain induced band gap. In all instances the estimated room temperature band gaps increased by a factor of two. The gating performance of back-gated thin-film transistor structures verified that the observed weak semiconductivity (p-type) inferred from the transport characteristic at room temperature. © 2014 Copyright Taylor & Francis Group, LLC.

A thermalization energy analysis of the threshold voltage shift in amorphous indium gallium zinc oxide thin film transistors under simultaneous negative gate bias and illumination

It has been previously observed that thin film transistors (TFTs) utilizing an amorphous indium gallium zinc oxide (a-IGZO) semiconducting channel suffer from a threshold voltage shift when subjected to a negative gate bias and light illumination simultaneously. In this work, a thermalization energy analysis has been applied to previously published data on negative bias under illumination stress (NBIS) in a-IGZO TFTs. A barrier to defect conversion of 0.65-0.75 eV is extracted, which is consistent with reported energies of oxygen vacancy migration. The attempt-to-escape frequency is extracted to be 10 6-107 s-1, which suggests a weak localization of carriers in band tail states over a 20-40 nm distance. Models for the NBIS mechanism based on charge trapping are reviewed and a defect pool model is proposed in which two distinct distributions of defect states exist in the a-IGZO band gap: these are associated with states that are formed as neutrally charged and 2+ charged oxygen vacancies at the time of film formation. In this model, threshold voltage shift is not due to a defect creation process, but to a change in the energy distribution of states in the band gap upon defect migration as this allows a state formed as a neutrally charged vacancy to be converted into one formed as a 2+ charged vacancy and vice versa. Carrier localization close to the defect migration site is necessary for the conversion process to take place, and such defect migration sites are associated with conduction and valence band tail states. Under negative gate bias stressing, the conduction band tail is depleted of carriers, but the bias is insufficient to accumulate holes in the valence band tail states, and so no threshold voltage shift results. It is only under illumination that the quasi Fermi level for holes is sufficiently lowered to allow occupation of valence band tail states. The resulting charge localization then allows a negative threshold voltage shift, but only under conditions of simultaneous negative gate bias and illumination, as observed experimentally as the NBIS effect. © 2014 AIP Publishing LLC.

Oxygen vacancy defects in Ta2O5 showing long-range atomic re-arrangements

The structure, formation energy, and energy levels of the various oxygen vacancies in Ta2O5 have been calculated using the λ phase model. The intra-layer vacancies give rise to unusual, long-range bonding rearrangements, which are different for each defect charge state. The 2-fold coordinated intra-layer vacancy is the lowest cost vacancy and forms a deep level 1.5 eV below the conduction band edge. The 3-fold intra-layer vacancy and the 2-fold inter-layer vacancy are higher cost defects, and form shallower levels. The unusual bonding rearrangements lead to low oxygen migration barriers, which are useful for resistive random access memory applications. © 2014 AIP Publishing LLC.

Dopant compensation in HfO2 and other high K oxides

The theory of doping limits in semiconductors and insulators is applied to the case of wide gap oxides, crystalline, or amorphous, and used to explain that impurities do not in general give rise to gap states or a doping response. Instead, the system tends to form defect complexes or undergo symmetry-lowering reconstructions to expel gap states out of the band gap. The model is applied to impurities, such as trivalent metals, carbon, N, P, and B, in HfO2, the main gate dielectric used in field effect transistors. © 2014 AIP Publishing LLC.