111 resultados para complementary-metal-oxide semiconductor (CMOS) image sensor


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Recent development of solution processable organic semiconductors delineates the emergence of a new generation of air-stable, high performance p- and n-type materials. This makes it indeed possible for printed organic complementary circuits (CMOS) to be used in real applications. The main technical bottleneck for organic CMOS to be adopted as the next generation organic integrated circuit is how to deposit and pattern both p- and n-type semiconductor materials with high resolutions at the same time. It represents a significant technical challenge, especially if it can be done for multiple layers without mask alignment. In this paper, we propose a one-step self-aligned fabrication process which allows the deposition and high resolution patterning of functional layers for both p- and n-channel thin film transistors (TFTs) simultaneously. All the dimensional information of the device components is featured on a single imprinting stamp, and the TFT-channel geometry, electrodes with different work functions, p- and n-type semiconductors and effective gate dimensions can all be accurately defined by one-step imprinting and the subsequent pattern transfer process. As an example, we have demonstrated an organic complementary inverter fabricated by 3D imprinting in combination with inkjet printing and the measured electrical characteristics have validated the feasibility of the novel technique. © 2012 Elsevier B.V. All rights reserved.

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Two near-ultraviolet (UV) sensors based on solution-grown zinc oxide (ZnO) nanowires (NWs) which are only sensitive to photo-excitation at or below 400 nm wavelength have been fabricated and characterized. Both devices keep all processing steps, including nanowire growth, under 100 °C for compatibility with a wide variety of substrates. The first device type uses a single optical lithography step process to allow simultaneous in situ horizontal NW growth from solution and creation of symmetric ohmic contacts to the nanowires. The second device type uses a two-mask optical lithography process to create asymmetric ohmic and Schottky contacts. For the symmetric ohmic contacts, at a voltage bias of 1 V across the device, we observed a 29-fold increase in current in comparison to dark current when the NWs were photo-excited by a 400 nm light-emitting diode (LED) at 0.15 mW cm(-2) with a relaxation time constant (τ) ranging from 50 to 555 s. For the asymmetric ohmic and Schottky contacts under 400 nm excitation, τ is measured between 0.5 and 1.4 s over varying time internals, which is ~2 orders of magnitude faster than the devices using symmetric ohmic contacts.

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Silicon carbide (SiC) based MOS capacitor devices are used for gas sensing in high temperature and chemically reactive environments. A SiC MOS capacitor structure used as hydrogen sensor is defined and simulated. The effects of hydrogen concentration, temperature and interface traps on C-V characteristics were analysed. A comparison between structures with different oxide layer types (SiO2, TiO2 and ZnO) and thicknesses (50..10nm) was conducted. The TiO2 based structure has better performance than the SiO2 and ZnO structures. Also, the performance of the SiC MOS capacitor increases at thinner oxide layers. © 2012 IEEE.

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It is widely reported that threshold voltage and on-state current of amorphous indium-gallium-zinc-oxide bottom-gate thin-film transistors are strongly influenced by the choice of source/drain contact metal. Electrical characterisation of thin-film transistors indicates that the electrical properties depend on the type and thickness of the metal(s) used. Electron transport mechanisms and possibilities for control of the defect state density are discussed. Pilling-Bedworth theory for metal oxidation explains the interaction between contact metal and amorphous indium-gallium-zinc-oxide, which leads to significant trap formation. Charge trapping within these states leads to variable capacitance diode-like behavior and is shown to explain the thin-film transistor operation. © 2013 AIP Publishing LLC.

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Design, FEM modelling and characterization of a novel dual mode thermal conductivity and infrared absorption sensor using SOI CMOS technology is reported. The dual mode sensing capability is based on the temperature sensitivity and wideband infrared radiation emission of the resistive heating element. The sensor was fabricated at a commercial foundry using a 1 μm process and measures only 1×1 mm2. Infrared detectors usually use thermopiles in addition to a separate IR source. A single highly responsive dual mode source and sensing element targeting not only low molecular mass gases but also greenhouse gases, while consuming 40 mW power at 700°C in synthetic air, thus makes this sensor particularly viable for battery powered handheld devices. © 2013 IEEE.

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Highly transparent zinc oxide (ZnO) nanowire networks have been used as the active material in thin film transistors (TFTs) and complementary inverter devices. A systematic study on a range of networks of variable density and TFT channel length was performed. ZnO nanowire networks provide a less lithographically intense alternative to individual nanowire devices, are always semiconducting, and yield significantly higher mobilites than those achieved from currently used amorphous Si and organic TFTs. These results suggest that ZnO nanowire networks could be ideal for inexpensive large area electronics. © 2009 American Institute of Physics.

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This paper reports on the synthesis of zinc oxide (ZnO) nanostructures and examines the performance of nanocomposite thin-film transistors (TFTs) fabricated using ZnO dispersed in both n- and p-type polymer host matrices. The ZnO nanostructures considered here comprise nanowires and tetrapods and were synthesized using vapor phase deposition techniques involving the carbothermal reduction of solid-phase zinc-containing compounds. Measurement results of nanocomposite TFTs based on dispersion of ZnO nanorods in an n-type organic semiconductor ([6, 6]-phenyl-C61-butyric acid methyl ester) show electron field-effect mobilities in the range 0.3-0.6 cm2V-1 s-1. representing an approximate enhancement by as much as a factor of 40 from the pristine state. The on/off current ratio of the nanocomposite TFTs approach 106 at saturation with off-currents on the order of 10 pA. The results presented here, although preliminary, show a highly promising enhancement for realization of high-performance solution-processable n-type organic TFTs. © 2008 IEEE.

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The Schottky barrier heights of various metals on the high permitivity oxides tantalum pentoxide, barium strontium titanate, lead zirconate titanate, and strontium bismuth tantalate have been calculated as a function of the metal work function. It is found that these oxides have a dimensionless Schottky barrier pinning factor S of 0.28-0.4 and not close to 1 because S is controlled by Ti-O-type bonds not Sr-O-type bonds, as assumed in earlier work. The band offsets on silicon are asymmetric with a much smaller offset at the conduction band, so that Ta2O5 and barium strontium titanate are relatively poor barriers to electrons on Si. © 1999 American Institute of Physics.

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Schottky barrier heights of various metals on tantalum pentoxide, barium strontium titanate, lead zirconate-titanate and strontium bismuth tantalate have been calculated as a function of metal work function. These oxides have a dimensionless Schottky barrier pinning factor, S, of 0.28 - 0.4 and not close to 1, because S is controlled by the Ti-O type bonds not Sr-O type bonds, as assumed previously. Band offsets on silicon are asymmetric with much smaller offset at the conduction band, so that Ta2O5 and barium strontium titanate (BST) are relatively poor barriers to electrons on Si.

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This paper describes coupled-effect simulations of smart micro gas-sensors based on standard BiCMOS technology. The smart sensor features very low power consumption, high sensitivity and potential low fabrication cost achieved through full CMOS integration. For the first time the micro heaters are made of active CMOS elements (i.e. MOSFET transistors) and embedded in a thin SOI membrane consisting of Si and SiO2 thin layers. Micro gas-sensors such as chemoresistive, microcalorimeteric and Pd/polymer gate FET sensors can be made using this technology. Full numerical analyses including 3D electro-thermo-mechanical simulations, in particular stress and deflection studies on the SOI membranes are presented. The transducer circuit design and the post-CMOS fabrication process, which includes single sided back-etching, are also reported.

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This paper describes a new generation of integrated solid-state gas-sensors embedded in SOI micro-hotplates. The micro-hotplates lie on a SOI membrane and consist of MOSFET heaters that elevate the operating temperature, through self-heating, of a gas sensitive material. These sensors are fully compatible with SOI CMOS or BiCMOS technologies, offer ultra-low power consumption (under 100 mW), high sensitivity, low noise, low unit cost, reproducibility and reliability through the use of on-chip integration. In addition, the new integrated sensors offer a nearly uniform temperature distribution over the active area at its operating temperatures at up to about 300-350°C. This makes SOI-based gas-sensing devices particularly attractive for use in handheld battery-operated gas monitors. This paper reports on the design of a chemo-resistive gas sensor and proposes for the first time an intelligent SOI membrane microcalorimeter using active micro-FET heaters and temperature sensors. A comprehensive set of numerical and analogue simulations is also presented including complex 2D and 3D electro-thermal numerical analyses. © 2001 Elsevier Science B.V. All rights reserved.

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This paper describes multiple field-coupled simulations and device characterization of fully CMOS-MEMS-compatible smart gas sensors. The sensor structure is designated for gas/vapour detection at high temperatures (>300 °C) with low power consumption, high sensitivity and competent mechanic robustness employing the silicon-on-insulator (SOI) wafer technology, CMOS process and micromachining techniques. The smart gas sensor features micro-heaters using p-type MOSFETs or polysilicon resistors and differentially transducing circuits for in situ temperature measurement. Physical models and 3D electro-thermo-mechanical simulations of the SOI micro-hotplate induced by Joule, self-heating, mechanic stress and piezoresistive effects are provided. The electro-thermal effect initiates and thus affects electronic and mechanical characteristics of the sensor devices at high temperatures. Experiments on variation and characterization of micro-heater resistance, power consumption, thermal imaging, deformation interferometry and dynamic thermal response of the SOI micro-hotplate have been presented and discussed. The full integration of the smart gas sensor with automatically temperature-reading ICs demonstrates the lowest power consumption of 57 mW at 300 °C and fast thermal response of 10 ms. © 2008 IOP Publishing Ltd.