126 resultados para Unbalanced Circuits


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With the emergence of transparent electronics, there has been considerable advancement in n-type transparent semiconducting oxide (TSO) materials, such as ZnO, InGaZnO, and InSnO. Comparatively, the availability of p-type TSO materials is more scarce and the available materials are less mature. The development of p-type semiconductors is one of the key technologies needed to push transparent electronics and systems to the next frontier, particularly for implementing p-n junctions for solar cells and p-type transistors for complementary logic/circuits applications. Cuprous oxide (Cu2O) is one of the most promising candidates for p-type TSO materials. This paper reports the deposition of Cu2O thin films without substrate heating using a high deposition rate reactive sputtering technique, called high target utilisation sputtering (HiTUS). This technique allows independent control of the remote plasma density and the ion energy, thus providing finer control of the film properties and microstructure as well as reducing film stress. The effect of deposition parameters, including oxygen flow rate, plasma power and target power, on the properties of Cu2O films are reported. It is known from previously published work that the formation of pure Cu2O film is often difficult, due to the more ready formation or co-formation of cupric oxide (CuO). From our investigation, we established two key concurrent criteria needed for attaining Cu2O thin films (as opposed to CuO or mixed phase CuO/Cu2O films). First, the oxygen flow rate must be kept low to avoid over-oxidation of Cu2O to CuO and to ensure a non-oxidised/non-poisoned metallic copper target in the reactive sputtering environment. Secondly, the energy of the sputtered copper species must be kept low as higher reaction energy tends to favour the formation of CuO. The unique design of the HiTUS system enables the provision of a high density of low energy sputtered copper radicals/ions, and when combined with a controlled amount of oxygen, can produce good quality p-type transparent Cu2O films with electrical resistivity ranging from 102 to 104 Ω-cm, hole mobility of 1-10 cm2/V-s, and optical band-gap of 2.0-2.6 eV. These material properties make this low temperature deposited HiTUS Cu 2O film suitable for fabrication of p-type metal oxide thin film transistors. Furthermore, the capability to deposit Cu2O films with low film stress at low temperatures on plastic substrates renders this approach favourable for fabrication of flexible p-n junction solar cells. © 2011 Elsevier B.V. All rights reserved.

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The motivation for our work is to identify a space for silicon carbide (SiC) devices in the silicon (Si) world. This paper presents a detailed experimental investigation of the switching behaviour of silicon and silicon carbide transistors (a JFET and a cascode device comprising a Si-MOSFET and a SiC-JFET). The experimental method is based on a clamped inductive load chopper circuit that puts considerable stress on the device and increases the transient power dissipation. A precise comparison of switching behaviour of Si and SiC devices on similar terms is the novelty of our work. The cascode is found to be an attractive fast switching device, capable of operating in two different configurations whose switching equivalent circuits are proposed here. The effect of limited dv/dt of the Si-MOSFET on the switching of the SiC-JFET in a cascode is also critically analysed.

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The paper presents a vector model for a Brushless Doubly-Fed Machine (BDFM). The BDFM has 4 and 8 pole stator windings and a nested-loop rotor cage. The rotor cage has six nests equally spaced around the circumference and each nest comprises three loops. All the rotor loops are short circuited via a common end-ring at one end. The vector model is derived based on the electrical equations of the machine and appropriate vector transformations. In contrast to the stator, there is no three phase circuit in the rotor. Therefore, the vector transformations suitable for three phase circuits can not be utilised for the rotor circuit. A new vector transformation is employed for the rotor circuit quantities. The approach presented in this paper can be extended for a BDFM with any stator poles combination and any number of loops per nest. Simulation results from the model implemented in Simulink are presented. © 2008 IEEE.

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Avalanche multiplication has been one of the major destructive failure mechanisms in IGBTs; in order to avoid operating an IGBT under abnormal conditions, it is desirable to develop peripheral protecting circuits monolithically integrated without compromising the operation and performance of the IGBT. In this paper, a monolithically integrated avalanche diode (D av) for 600V Trench IGBT over-voltage protection is proposed. The mix-mode transient simulation proves the clamping capability of the D av when the IGBT is experiencing over-voltage stress in unclamped inductive switching (UIS) test. The spread of avalanche energy, which prevents hot-spot formation, through the help of the avalanche diode feeding back a large fraction of the avalanche current to a gate resistance (R G) is also explained. © 2011 IEEE.

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Power consumption of a multi-GHz local clock driver is reduced by returning energy stored in the clock-tree load capacitance back to the on-chip power-distribution grid. We call this type of return energy recycling. To achieve a nearly square clock waveform, the energy is transferred in a non-resonant way using an on-chip inductor in a configuration resembling a full-bridge DC-DC converter. A zero-voltage switching technique is implemented in the clock driver to reduce dynamic power loss associated with the high switching frequencies. A prototype implemented in 90 nm CMOS shows a power savings of 35% at 4 GHz. The area needed for the inductor in this new clock driver is about 6% of a local clock region. © 2006 IEEE.

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We have grown vertically aligned single-walled carbon nanotube forests with an area density of 1.5 × 10(13) cm(-2), the highest yet achieved, by reducing the average diameter of the nanotubes. We use a nanolaminate Fe-Al(2)O(3) catalyst design consisting of three layers of Al(2)O(3), Fe, and Al(2)O(3), in which the lower Al(2)O(3) layer is densified by an oxygen plasma treatment to increase its diffusion barrier properties, to allow a thinner catalyst layer to be used. This high nanotube density is desirable for using carbon nanotubes as interconnects in integrated circuits.

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An analytical model for the electric field and the breakdown voltage (BV) of an unbalanced superjunction (SJ) device is presented in this paper. The analytical technique uses a superposition approach treating the asymmetric charge in the pillars as an excess charge component superimposed on a balanced charge component. The proposed double-exponentialmodel is able to accurately predict the electric field and the BV for unbalanced SJ devices in both punch through and non punch through conditions. The model is also reasonably accurate at extremely high levels of charge imbalance when the devices behave similarly to a PiN diode or to a high-conductance layer. The analytical model is compared against numerical simulations of charge unbalanced SJ devices and against experimental results. © 2009 IEEE.

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Process simulation programs are valuable in generating accurate impurity profiles. Apart from accuracy the programs should also be efficient so as not to consume vast computer memory. This is especially true for devices and circuits of VLSI complexity. In this paper a remeshing scheme to make the finite element based solution of the non-linear diffusion equation more efficient is proposed. A remeshing scheme based on comparing the concentration values of adjacent node was then implemented and found to remove the problems of oscillation.

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We demonstrate the growth of multi wall and single wall carbon nanotubes (CNT) onto substrates containing commercial 1-m CMOS integrated circuits. The low substrate temperature growth (450°C) was achieved by using hot filament (1000 °C) to preheat the source gases (C 2H 2 and NH 3) and in situ mass spe-ctroscopy was used to identify the gas species present. Field effect transistors based on Single Walled Carbon Nanotube (SWNT) grown under such conditions were fabricated and examined. CNT growth was performed directly on the passivation layer of the CMOS integrated circuits. Individual n- and p-type CMOS transistors were compared before and after CNT growth. The transistors survive and operate after the CNT growth process, although small degradations are observed in the output current (for p-transistors) and leakage current (for both p- and n-type transistors). © 2010 IEEE.

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An infinite series of twofold, two-way weavings of the cube, corresponding to 'wrappings', or double covers of the cube, is described with the aid of the two-parameter Goldberg- Coxeter construction. The strands of all such wrappings correspond to the central circuits (CCs) of octahedrites (four-regular polyhedral graphs with square and triangular faces), which for the cube necessarily have octahedral symmetry. Removing the symmetry constraint leads to wrappings of other eight-vertex convex polyhedra. Moreover, wrappings of convex polyhedra with fewer vertices can be generated by generalizing from octahedrites to i-hedrites, which additionally include digonal faces. When the strands of a wrapping correspond to the CCs of a four-regular graph that includes faces of size greater than 4, non-convex 'crinkled' wrappings are generated. The various generalizations have implications for activities as diverse as the construction of woven-closed baskets and the manufacture of advanced composite components of complex geometry. © 2012 The Royal Society.

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An advanced 700V Smart Trench IGBT with monolithically integrated over-voltage and over-current protecting circuits is presented in this paper. The proposed Smart IGBT comprises a sense IGBT, a low voltage lateral n-channel MOSFET (M 1), an avalanche diode (D av), and poly-crystalline Zener diodes (ZD) and resistor (R poly). Mix-mode transient simulations with MEDICI have proven the functionalities of the protecting circuits when the device is operating under abnormal conditions, such as Unclamped Inductive Switching (UIS) and Short Circuit (SC) condition. A Trench IGBT process is used to fabricate this device with total 11 masks including one metal mask only. The characterizations of the fabricated device exhibit the clamping capability of the avalanche diode and voltage pull-down ability of the MOSFET. © 2012 IEEE.

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Acoustic communication in drosophilid flies is based on the production and perception of courtship songs, which facilitate mating. Despite decades of research on courtship songs and behavior in Drosophila, central auditory responses have remained uncharacterized. In this study, we report on intracellular recordings from central neurons that innervate the Drosophila antennal mechanosensory and motor center (AMMC), the first relay for auditory information in the fly brain. These neurons produce graded-potential (nonspiking) responses to sound; we compare recordings from AMMC neurons to extracellular recordings of the receptor neuron population [Johnston's organ neurons (JONs)]. We discover that, while steady-state response profiles for tonal and broadband stimuli are significantly transformed between the JON population in the antenna and AMMC neurons in the brain, transient responses to pulses present in natural stimuli (courtship song) are not. For pulse stimuli in particular, AMMC neurons simply low-pass filter the receptor population response, thus preserving low-frequency temporal features (such as the spacing of song pulses) for analysis by postsynaptic neurons. We also compare responses in two closely related Drosophila species, Drosophila melanogaster and Drosophila simulans, and find that pulse song responses are largely similar, despite differences in the spectral content of their songs. Our recordings inform how downstream circuits may read out behaviorally relevant information from central neurons in the AMMC.

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The object of this paper is to give a complete treatment of the realizability of positive-real biquadratic impedance functions by six-element series-parallel networks comprising resistors, capacitors, and inductors. This question was studied but not fully resolved in the classical electrical circuit literature. Renewed interest in this question arises in the synthesis of passive mechanical impedances. Recent work by the authors has introduced the concept of a regular positive-real functions. It was shown that five-element networks are capable of realizing all regular and some (but not all) nonregular biquadratic positive-real functions. Accordingly, the focus of this paper is on the realizability of nonregular biquadratics. It will be shown that the only six-element series-parallel networks which are capable of realizing nonregular biquadratic impedances are those with three reactive elements or four reactive elements. We identify a set of networks that can realize all the nonregular biquadratic functions for each of the two cases. The realizability conditions for the networks are expressed in terms of a canonical form for biquadratics. The nonregular realizable region for each of the networks is explicitly characterized. © 2004-2012 IEEE.

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Because of its fascinating electronic properties, graphene is expected to produce breakthroughs in many areas of nanoelectronics. For spintronics, its key advantage is the expected long spin lifetime, combined with its large electron velocity. In this article, we review recent theoretical and experimental results showing that graphene could be the long-awaited platform for spintronics. A critical parameter for both characterization and devices is the resistance of the contact between the electrodes and the graphene, which must be large enough to prevent quenching of the induced spin polarization but small enough to allow for the detection of this polarization. Spin diffusion lengths in the 100-μm range, much longer than those in conventional metals and semiconductors, have been observed. This could be a unique advantage for several concepts of spintronic devices, particularly for the implementation of complex architectures or logic circuits in which information is coded by pure spin currents. © Copyright 2012 Materials Research Society.