155 resultados para Transistor


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This paper evaluates the technique used to improve the latching characteristics of the 200 V n-type superjunction (SJ) lateral insulated-gate bipolar transistor (LIGBT) on a partial silicon-on-insulator. SJ IGBT devices are more prone to latch-up than standard IGBTs due to the presence of a strong pnp transistor with the p layer serving as an effective collector of holes. The initial SJ LIGBT design latches at about 23 V with a gate voltage of 5 V with a forward voltage drop (VON) of 2 V at 300 Acm2. The latch-up current density is 1100 Acm2. The latest SJ LIGBT design shows an increase in latch-up voltage close to 100 V without a significant penalty in VON. The latest design shows a latch-up current density of 1195 A cm2. The enhanced robustness against static latch-up leads to a better forward bias safe operating area. © 1963-2012 IEEE.

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It is widely reported that threshold voltage and on-state current of amorphous indium-gallium-zinc-oxide bottom-gate thin-film transistors are strongly influenced by the choice of source/drain contact metal. Electrical characterisation of thin-film transistors indicates that the electrical properties depend on the type and thickness of the metal(s) used. Electron transport mechanisms and possibilities for control of the defect state density are discussed. Pilling-Bedworth theory for metal oxidation explains the interaction between contact metal and amorphous indium-gallium-zinc-oxide, which leads to significant trap formation. Charge trapping within these states leads to variable capacitance diode-like behavior and is shown to explain the thin-film transistor operation. © 2013 AIP Publishing LLC.

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We investigate the use of a percolation-field-effect-transistor for the continuous weak measurement of a spatially Rabi oscillating trapped electron through the change in percolation pathway of the transistor channel. In contrast to conventional devices, this detection mechanism in principle does not require a change in the stored energy of the gate capacitance to modify the drain current, so reducing the measurement back-action. The signal-to-noise ratio and measurement bandwidth are seen to be improved compared to conventional devices, allowing further aspects of the dynamic behaviour to be observed. © 2013 AIP Publishing LLC.

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Electrical detection of solid-state charge qubits requires ultrasensitive charge measurement, typically using a quantum point contact or single-electron-transistor, which imposes strict limits on operating temperature, voltage and current. A conventional FET offers relaxed operating conditions, but the back-action of the channel charge is a problem for such small quantum systems. Here, we discuss the use of a percolation transistor as a measurement device, with regard to charge sensing and backaction. The transistor is based on a 10nm thick SOI channel layer and is designed to measure the displacement of trapped charges in a nearby dielectric. At cryogenic temperatures, the trapped charges result in strong disorder in the channel layer, so that current is constrained to a percolation pathway in sub-threshold conditions. A microwave driven spatial Rabi oscillation of the trapped charge causes a change in the percolation pathway, which results in a measurable change in channel current. © The Electrochemical Society.

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We demonstrate a new type of transistors, the electrical/optical "dual-function redox-potential transistors", which is solution processable and environmentally stable. This device consists of vertically staked electrodes that act as gate, emitter and collector. It can perform as a normal transistor, whilst one electrode which is sensitised by dye enables to generate photocurrent when illuminated. Solution processable oxide-nanoparticles were used to form various functional layers, which allow an electrolyte to penetrate through and, consequently, the current between emitter and collector can be controlled by the gate potential modulated distribution of ions. The result here shows that the device performs with high ON-current under low driving voltage (<1â€...V), while the transistor performance can readily be controlled by photo-illumination. Such device with combined optical and electrical functionalities allows single device to perform the tasks that are usually done by a circuit/system with multiple optical and electrical components, and it is promising for various applications.

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A gate-modulated nanowire oxide photosensor is fabricated by electron-beam lithography and conventional dry etch processing.. The device characteristics are good, including endurance of up to 10(6) test cycles, and gate-pulse excitation is used to remove persistent photoconductivity. The viability of nanowire oxide phototransistors for high speed and high resolution applications is demonstrated, thus potentially expanding the scope of exploitation of touch-free interactive displays.

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Highly sensitive biosensor for detection of acetylcholine (ACh) and competitive acetylcholinesterase (AChE) inhibitor, eserine, is investigated. Peculiar microelectronic configuration of an ion-sensitive field-effect transistor (ISFET) in addition to a right choice of the pH-transducing nanolayers allows recording a response of the enzyme-modified ISFET (EnFET) to a wide range of ACh concentrations. We demonstrate a remarkable improvement of at least three orders of magnitude in dose response to ACh. Described bioelectronic system reveals clear response, when the catalytic activity of the immobilized AChE is inhibited in a reversible manner by eserine, competitive inhibitor of AChE. ©2007 IEEE.

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A high performance ferroelectric non-volatile memory device based on a top-gate ZnO nanowire (NW) transistor fabricated on a glass substrate is demonstrated. The ZnO NW channel was spin-coated with a poly (vinylidenefluoride-co-trifluoroethylene) (P(VDF-TrFE)) layer acting as a top-gate dielectric without buffer layer. Electrical conductance modulation and memory hysteresis are achieved by a gate electric field induced reversible electrical polarization switching of the P(VDF-TrFE) thin film. Furthermore, the fabricated device exhibits a memory window of ∼16.5 V, a high drain current on/off ratio of ∼105, a gate leakage current below ∼300 pA, and excellent retention characteristics for over 104 s. © 2014 AIP Publishing LLC.

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We review the potential of graphene in ultra-high speed circuits. To date, most of high-frequency graphene circuits typically consist of a single transistor integrated with a few passive components. The development of multi-transistor graphene integrated circuits operating at GHz frequencies can pave the way for applications in which high operating speed is traded off against power consumption and circuit complexity. Novel vertical and planar devices based on a combination of graphene and layered materials could broaden the scope and performances of future devices. © 2013 IEEE.