Physical modelling of large area 4H-SiC PiN diodes

The recent developments in SiC PiN diode research mean that physics-based models that allow accurate, rapid prediction of switching and conduction performance and resulting converter losses will soon be required. This is especially the case given the potential for very high voltage converters to be used for enabling distributed and renewable power generation. In this work an electro-thermal compact model of a 4.5 kV silicon carbide PiN diode has been developed for converter loss modelling in Simulink. Good matching of reverse recovery has been achieved between 25 and 200 °C. The I-V characteristics of the P+ anode contact have been shown to be significant in obtaining good matching for the forward characteristics of the diode, requiring further modelling work in this area. © 2009 IEEE.

Hafnia nanoparticles - a model system for graphene growth on a dielectric

We study graphene growth on hafnia (HfO2) nanoparticles by chemical vapour deposition using optical microscopy, high resolution transmission electron microscopy and Raman spectroscopy. We find that monoclinic HfO2 nanoparticles neither reduce to a metal nor form a carbide while nucleating nanometer domain-sized few layer graphene. Hence we regard this as an interesting non-metallic catalyst model system with the potential to explore graphene growth directly on a (high-k) dielectric. HfO2 nanoparticles coated with few layer graphene by atmospheric pressure CVD with methane and hydrogen at 950 °C. (© 2011 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim) Graphene growth on hafnia (HfO2) nanoparticles by chemical vapour deposition (CVD) is studied. It is found that monoclinic HfO2 nanoparticles neither reduce to a metal nor form a carbide while nucleating nanometer domain-sized few layer graphene. Hence the authors of this Letter regard this as an interesting non-metallic catalyst model system with the potential to explore graphene growth directly on a (high-k) dielectric. © 2011 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

The microstructure and mechanical properties of ball-milled stainless steel powder: The effect of hot-pressing vs. laser sintering

The microstructure and mechanical properties of sintered stainless steel powder, of composition AISI 420, have been measured. Ball-milled powder comprising nanoscale grains was sintered to bulk specimens by two alternative routes: hot-pressing and microlaser sintering. The laser-sintered alloy has a porosity of 6% and comprises a mixture of delta ferrite and tempered martensite, and the relative volume fraction varies along the axis of the specimen due to a thermal cycle that evolves with progressive deposition. In contrast, the hot-pressed alloy has a porosity of 0.7% and exhibits a martensitic lath structure with carbide particles at the boundaries of the prior austenite grains. These differences in microstructure lead to significant differences in mechanical properties. For example, the uniaxial tensile strength of the hot-pressed material is one-half of its compressive strength, due to void initiation at the carbide particles at the prior austenite grain boundaries. Nanoindentation measurements reveal a size effect in hardness and also reveal the sensitivity of hardness to the presence of mechanical polishing and electropolishing. © 2011 Acta Materialia Inc. Published by Elsevier Ltd. All rights reserved.

A high temperature SOI CMOS NO2 sensor

For more than 20 years researchers have been interested in developing micro-gas sensors based on silicon technology. Most of the reported devices are based on micro-hotplates, however they use materials that are not CMOS compatible, and therefore are not suitable for large volume manufacturing. Furthermore, they do not allow the circuitry to be integrated on to the chip. CMOS compatible devices have been previously reported. However, these use polysilicon as the heater material, which has long term stability problems at high temperatures. Here we present low power, low cost SOI CMOS NO2 sensors, based on high stability single crystal silicon P+ micro-heaters platforms, capable of measuring gas concentrations down to 0.1 ppm. We have integrated a thin tungsten molybdenum oxide layer as a sensing material with a foundry-standard SOI CMOS micro-hotplate and tested this to NO2. We believe these devices have the potential for use as robust, very low power consumption, low cost gas sensors. © 2011 American Institute of Physics.

High temperature robust SOI ethanol sensor

In this paper we present a robust SOI-CMOS ethanol sensor based on a tungsten-doped lanthanum iron oxide sensing material. The device shows response to gas, has low power consumption, good uniformity, high temperature stability and can be manufactured at low cost and with integrated circuitry. The platform is a tungsten-based CMOS micro-hotplate that has been shown to be stable for over two thousand hours at a high temperature (600°C) in a form of accelerated life test. The tungsten-doped lanthanum iron oxide was deposited on the micro-hotplate as a slurry with terpineol using a syringe, dried and annealed. Preliminary gas testing was done and the material shows response to ethanol vapour. These results are promising and we believe that this combination of a robust CMOS micro-hotplate and a good sensing material can form the basis for a commercial CMOS gas sensor. © 2011 Published by Elsevier Ltd.

Phototransistors utilizing individual WS2 nanotubes

We report on the photoresponse characteristics of tungsten disulfide (WS2) nanotubes. Field effect transistors (FETs) were fabricated by using individual WS2 multiwall nanotubes. Photo-sensitivity to visible light is clearly observed, with enhancement of the channel conductivity, carrier mobility and carrier concentration upon illumination in the visible regime. Polarization-sensitive measurements reveal a strong anisotropy of the photocurrent on the polarization angle of the incident light with respect to the WS2 nanotube axis. This nano-scale transistor capable of detecting visible light would have a wide range of applications in medical and consumer electronics. © 2008 IEEE. Crown Copyright.

Highly efficient spin transport in epitaxial graphene on SiC

Spin information processing is a possible new paradigm for post-CMOS (complementary metal-oxide semiconductor) electronics and efficient spin propagation over long distances is fundamental to this vision. However, despite several decades of intense research, a suitable platform is still wanting. We report here on highly efficient spin transport in two-terminal polarizer/analyser devices based on high-mobility epitaxial graphene grown on silicon carbide. Taking advantage of high-impedance injecting/detecting tunnel junctions, we show spin transport efficiencies up to 75%, spin signals in the mega-ohm range and spin diffusion lengths exceeding 100μm. This enables spintronics in complex structures: devices and network architectures relying on spin information processing, well beyond present spintronics applications, can now be foreseen. © 2012 Macmillan Publishers Limited. All rights reserved.

The phase of iron catalyst nanoparticles during carbon nanotube growth

We study the Fe-catalyzed chemical vapor deposition of carbon nanotubes by complementary in situ grazing-incidence X-ray diffraction, in situ X-ray reflectivity, and environmental transmission electron microscopy. We find that typical oxide supported Fe catalyst films form widely varying mixtures of bcc and fcc phased Fe nanoparticles upon reduction, which we ascribe to variations in minor commonly present carbon contamination levels. Depending on the as-formed phase composition, different growth modes occur upon hydrocarbon exposure: For γ-rich Fe nanoparticle distributions, metallic Fe is the active catalyst phase, implying that carbide formation is not a prerequisite for nanotube growth. For α-rich catalyst mixtures, Fe3C formation more readily occurs and constitutes part of the nanotube growth process. We propose that this behavior can be rationalized in terms of kinetically accessible pathways, which we discuss in the context of the bulk iron-carbon phase diagram with the inclusion of phase equilibrium lines for metastable Fe3C. Our results indicate that kinetic effects dominate the complex catalyst phase evolution during realistic CNT growth recipes. © 2012 American Chemical Society.

Half-bridge SIC inverter for hybrid electric vehicles: Design, development and testing at higher operating temperature

In recent years, Silicon Carbide (SiC) semiconductor devices have shown promise for high density power electronic applications, due to their electrical and thermal properties. In this paper, the performance of SiC JFETs for hybrid electric vehicle (HEV) applications is investigated at heatsink temperatures of 100 °C. The thermal runaway characteristics, maximum current density and packaging temperature limitations of the devices are considered and the efficiency implications discussed. To quantify the power density capabilities of power transistors, a novel 'expression of rating' (EoR) is proposed. A prototype single phase, half-bridge voltage source inverter using SiC JFETs is also tested and its performance at 25 °C and 100 °C investigated.

Tantalum-oxide catalysed chemical vapour deposition of single- and multi-walled carbon nanotubes

Tantalum-oxide thin films are shown to catalyse single- and multi-walled carbon nanotube growth by chemical vapour deposition. A low film thickness, the nature of the support material (best results with SiO2) and an atmospheric process gas pressure are of key importance for successful nanotube nucleation. Strong material interactions, such as silicide formation, inhibit nanotube growth. In situ X-ray photoelectron spectroscopy indicates that no catalyst reduction to Ta-metal or Ta-carbide occurs during our nanotube growth conditions and that the catalytically active phase is the Ta-oxide phase. Such a reduction-free oxide catalyst can be technologically advantageous. © 2013 The Royal Society of Chemistry.

In situ observations of the atomistic mechanisms of Ni catalyzed low temperature graphene growth.

The key atomistic mechanisms of graphene formation on Ni for technologically relevant hydrocarbon exposures below 600 °C are directly revealed via complementary in situ scanning tunneling microscopy and X-ray photoelectron spectroscopy. For clean Ni(111) below 500 °C, two different surface carbide (Ni2C) conversion mechanisms are dominant which both yield epitaxial graphene, whereas above 500 °C, graphene predominantly grows directly on Ni(111) via replacement mechanisms leading to embedded epitaxial and/or rotated graphene domains. Upon cooling, additional carbon structures form exclusively underneath rotated graphene domains. The dominant graphene growth mechanism also critically depends on the near-surface carbon concentration and hence is intimately linked to the full history of the catalyst and all possible sources of contamination. The detailed XPS fingerprinting of these processes allows a direct link to high pressure XPS measurements of a wide range of growth conditions, including polycrystalline Ni catalysts and recipes commonly used in industrial reactors for graphene and carbon nanotube CVD. This enables an unambiguous and consistent interpretation of prior literature and an assessment of how the quality/structure of as-grown carbon nanostructures relates to the growth modes.

Silicon on insulator thermodiode with extremely wide working temperature range

This paper presents for the first time the performance of a silicon-on-insulator (SOI) p-n thermodiode, which can operate in an extremely wide temperature range of 200°C to 700°C while maintaining its linearity. The thermodiode is embedded in a thin dielectric membrane underneath a tungsten microheater, which allows the diode characterization at very high temperature (> 800°C). The effect of the junction area (Aj) on the thermodiode linearity, sensitivity and self-heating is experimentally and theoretically investigated. Results on the long-term diode stability at high temperature are also reported. © 2013 IEEE.

A high temperature and low power SOI CMOS MEMS based thermal conductivity gas sensor

The design, 3D FEM modelling and measurement results of a novel high temperature, low power SOI CMOS MEMS thermal conductivity gas sensor are presented here. The sensor consists of a circular membrane with an embedded tungsten micro-heater. The high sensing capability is based on the temperature sensitivity of the resistive heating element. The sensor was fabricated at a commercial foundry using a 1 μm process and measures only 1×1 mm 2. The circular membrane has a 600 μm diameter while the heating element has a 320 μm diameter. Measurement results show that for a constant power consumption of 75 mW the heater temperature was 562.4°C in air, 565.9°C in N2, 592.5°C for 1 % H2 in Ar and 599.5°C in Ar. © 2013 IEEE.

A thermopile based SOI CMOS MEMS wall shear stress sensor

In this paper we present for the first time, a novel silicon on insulator (SOI) complementary metal oxide semiconductor (CMOS) MEMS thermal wall shear stress sensor based on a tungsten hot-film and three thermopiles. These devices have been fabricated using a commercial 1 μm SOI-CMOS process followed by a deep reactive ion etch (DRIE) back-etch step to create silicon oxide membranes under the hot-film for effective thermal isolation. The sensors show an excellent repeatability of electro-thermal characteristics and can be used to measure wall shear stress in both constant current anemometric as well as calorimetric modes. The sensors have been calibrated for wall shear stress measurement of air in the range of 0-0.48 Pa using a suction type, 2-D flow wind tunnel. The calibration results show that the sensors have a higher sensitivity (up to four times) in calorimetric mode compared to anemometric mode for wall shear stress lower than 0.3 Pa. © 2013 IEEE.

Optimising the dynamic performance of an all-wide-bandgap cascode switch

A SPICE simulation model of a novel cascode switch that combines a high voltage normally-on silicon carbide (SiC) junction field effect transistor (JFET) with a low voltage enhancement-mode gallium nitride field effect transistor (eGaN FET) has been developed, with the aim of optimising cascode switching performance. The effect of gate resistance on stability and switching losses is investigated and optimum values chosen. The effects of stray inductance on cascode switching performance are considered and the benefits of low inductance packaging discussed. The use of a positive JFET gate bias in a cascode switch is shown to reduce switching losses as well as reducing on-state losses. The findings of the simulation are used to produce a list of priorities for the design and layout of wide-bandgap cascode switches, relevant to both SiC and GaN high voltage devices. © 2013 IEEE.