150 resultados para Negative dimension integration
Resumo:
A novel CMOS compatible lateral thyristor is proposed in this paper. Its thyristor conduction is fully controlled by a p-MOS gate. Loss of MOS control due to parasitic latch-up has been eliminated and triggering of the main thyristor at lower forward current achieved. The device operation has been verified by 2-D numerical simulations and experimental fabrication.
Resumo:
MOTIVATION: We present a method for directly inferring transcriptional modules (TMs) by integrating gene expression and transcription factor binding (ChIP-chip) data. Our model extends a hierarchical Dirichlet process mixture model to allow data fusion on a gene-by-gene basis. This encodes the intuition that co-expression and co-regulation are not necessarily equivalent and hence we do not expect all genes to group similarly in both datasets. In particular, it allows us to identify the subset of genes that share the same structure of transcriptional modules in both datasets. RESULTS: We find that by working on a gene-by-gene basis, our model is able to extract clusters with greater functional coherence than existing methods. By combining gene expression and transcription factor binding (ChIP-chip) data in this way, we are better able to determine the groups of genes that are most likely to represent underlying TMs. AVAILABILITY: If interested in the code for the work presented in this article, please contact the authors. SUPPLEMENTARY INFORMATION: Supplementary data are available at Bioinformatics online.
Time integration techniques to investigate the long-term behaviour of dissipative structural systems
Resumo:
It has been shown that the apparent benefits of a two-layer stacked SOI system, i.e. packing density and speed improvements, are less than could be expected in the context of a VLSI requirement [1]. In this project the stacked SOI system has been identified as having major application in the realization of integrated, mixed technology systems. Zone-melting-recrystallization (ZMR) with lasers and electron beams have been used to produce device quality SOI material and a small test-bed circuit has been designed as a demonstration of the feasibility of this approach. © 1988.