221 resultados para Junction transistors.
Resumo:
The electric field distribution in the super junction power MOSFET is analyzed using analytical modeling and numerical simulations in this paper. The single-event burn-out (SEB) and single-event gate rupture (SEGR) phenomena in this device are studied in detail. It is demonstrated that the super junction device is much less sensitive to SEB and SEGR compared to the standard power MOSFET. The physical mechanism is explained.
Resumo:
A detailed physical model of amorphous silicon (aSi:H) is incorporated into a twodimensional device simulator to examine the frequency response limits of silicon heterojunction bipolar transistors (HBT's) with aSi:H emitters. The cutoff frequency is severely limited by the transit time in the emitter space charge region, due to the low electron drift mobility in aSi:H, to 98 MHz which compares poorly with the 37 GHz obtained for a silicon homojunction bipolar transistor with the same device structure. The effects of the amorphous heteroemitter material parameters (doping, electron drift mobility, defect density and interface state density) on frequency response are then examined to find the requirements for an amorphous heteroemitter material such that the HBT has better frequency response than the equivalent homojunction bipolar transistor. We find that an electron drift mobility of at least 100 cnr'V"'"1 is required in the amorphous heteroemitter and at a heteroemitter drift mobility of 350 cm2 · V1· s1 and heteroemitter doping of 5×1017 cm3, a maximum cutoff frequency of 52 GHz can be expected. © 1996 IEEE.
Resumo:
This paper presents direct growth of horizontally aligned carbon nanotubes (CNTs) between two predefined various inter-spacing up to tens of microns of electrodes (pads) and its use as CNT field-effect transistors (CNT-FETs). The catalytic metals were prepared, consisting of iron (Fe), aluminum (Al) and platinum (Pt) triple layers, on the thermal silicon oxide substrate (Pt/Al/Fe/SiO2). Scanning electron microscopy measurements of CNT-FETs from the as-grown samples showed that over 80% of the nanotubes are grown across the catalytic electrodes. Moreover, the number of CNTs across the catalytic electrodes is roughly controllable by adjusting the growth condition. The Al, as the upper layer on Fe electrode, not only plays a role as a barrier to prevent vertical growth but also serves as a porous medium that helps in forming smaller nano-sized Fe particles which would be necessary for lateral growth of CNTs. Back-gate field effect transistors were demonstrated with the laterally aligned CNTs. The on/off ratios in all the measured devices are lower than 100 due to the drain leakage current. ©2010 IEEE.
Resumo:
We demonstrated a controllable tuning of the electronic characteristics of ZnO nanowire field effect transistors (FETs) using a high-energy proton beam. After a short proton irradiation time, the threshold voltage shifted to the negative gate bias direction with an increase in the electrical conductance, whereas the threshold voltage shifted to the positive gate bias direction with a decrease in the electrical conductance after a long proton irradiation time. The electrical characteristics of two different types of ZnO nanowires FET device structures in which the ZnO nanowires are placed on the substrate or suspended above the substrate and photoluminescence (PL) studies of the ZnO nanowires provide substantial evidence that the experimental observations result from the irradiation-induced charges in the bulk SiO(2) and at the SiO(2)/ZnO nanowire interface, which can be explained by a surface-band-bending model in terms of gate electric field modulation. Our study on the proton-irradiation-mediated functionalization can be potentially interesting not only for understanding the proton irradiation effects on nanoscale devices, but also for creating the property-tailored nanoscale devices.
Resumo:
Surface-architecture-controlled ZnO nanowires were grown using a vapor transport method on various ZnO buffer film coated c-plane sapphire substrates with or without Au catalysts. The ZnO nanowires that were grown showed two different types of geometric properties: corrugated ZnO nanowires having a relatively smaller diameter and a strong deep-level emission photoluminescence (PL) peak and smooth ZnO nanowires having a relatively larger diameter and a weak deep-level emission PL peak. The surface morphology and size-dependent tunable electronic transport properties of the ZnO nanowires were characterized using a nanowire field effect transistor (FET) device structure. The FETs made from smooth ZnO nanowires with a larger diameter exhibited negative threshold voltages, indicating n-channel depletion-mode behavior, whereas those made from corrugated ZnO nanowires with a smaller diameter had positive threshold voltages, indicating n-channel enhancement-mode behavior.
Resumo:
From the wide spectrum of potential applications of graphene, ranging from transistors and chemical sensors to nanoelectromechanical devices and composites, the field of photonics and optoelectronics is believed to be one of the most promising. Indeed, graphene's suitability for high-speed photodetection was demonstrated in an optical communication link operating at 10 Gbit s(-1). However, the low responsivity of graphene-based photodetectors compared with traditional III-V-based ones is a potential drawback. Here we show that, by combining graphene with plasmonic nanostructures, the efficiency of graphene-based photodetectors can be increased by up to 20 times, because of efficient field concentration in the area of a p-n junction. Additionally, wavelength and polarization selectivity can be achieved by employing nanostructures of different geometries.
Resumo:
We demonstrated the nonvolatile memory functionality of ZnO nanowire field effect transistors (FETs) using mobile protons that are generated by high-pressure hydrogen annealing (HPHA) at relatively low temperature (400 °C). These ZnO nanowire devices exhibited reproducible hysteresis, reversible switching, and nonvolatile memory behaviors in comparison with those of the conventional FET devices. We show that the memory characteristics are attributed to the movement of protons between the Si/SiO(2) interface and the SiO(2)/ZnO nanowire interface by the applied gate electric field. The memory mechanism is explained in terms of the tuning of interface properties, such as effective electric field, surface charge density, and surface barrier potential due to the movement of protons in the SiO(2) layer, consistent with the UV photoresponse characteristics of nanowire memory devices. Our study will further provide a useful route of creating memory functionality and incorporating proton-based storage elements onto a modified CMOS platform for FET memory devices using nanomaterials.