Sensor data scheduling for linear quadratic Gaussian control with full state feedback

Networked control systems (NCSs) have attracted much attention in the past decade due to their many advantages and growing number of applications. Different than classic control systems, resources in NCSs, such as network bandwidth and communication energy, are often limited, which degrade the closed-loop system performance and may even cause the system to become unstable. Seeking a desired trade-off between the closed-loop system performance and the limited resources is thus one heated area of research. In this paper, we analyze the trade-off between the sensor-to-controller communication rate and the closed-loop system performance indexed by the conventional LQG control cost. We present and compare several sensor data schedules, and demonstrate that two event-based sensor data schedules provide better trade-off than an optimal offline schedule. Simulation examples are provided to illustrate the theories developed in the paper. © 2012 AACC American Automatic Control Council).

Antiwindup design for induction motor control in the field weakening domain

Operation of induction machines in the high-speed and/or high-torque range requires field-weakening to comply with voltage and current physical limitations. This paper presents an anti-windup approach to this problem: rather than developing an ad-hoc field weakening strategy in the high-speed region, we equip an unconstrained vector-control design with an anti-windup module that automatically adjusts the current and flux set-points so that voltage and current constraints are satisfied at every operating point. The anti-windup module includes a feedforward modification of the set point aimed at maximizing the available torque in steady-state and a feedback modification of the controller based on an internal model-based antiwindup scheme. This paper includes a complete stability analysis of the proposed solution and presents encouraging experimental results on an industrial drive. © 2012 IEEE.

Slow peaking and low-gain designs for global stabilization of nonlinear systems

This paper presents an analysis of the slow-peaking phenomenon, a pitfall of low-gain designs that imposes basic limitations to large regions of attraction in nonlinear control systems. The phenomenon is best understood on a chain of integrators perturbed by a vector field up(x, u) that satisfies p(x, 0) = 0. Because small controls (or low-gain designs) are sufficient to stabilize the unperturbed chain of integrators, it may seem that smaller controls, which attenuate the perturbation up(x, u) in a large compact set, can be employed to achieve larger regions of attraction. This intuition is false, however, and peaking may cause a loss of global controllability unless severe growth restrictions are imposed on p(x, u). These growth restrictions are expressed as a higher order condition with respect to a particular weighted dilation related to the peaking exponents of the nominal system. When this higher order condition is satisfied, an explicit control law is derived that achieves global asymptotic stability of x = 0. This stabilization result is extended to more general cascade nonlinear systems in which the perturbation p(x, v) v, v = (ξ, u) T, contains the state ξ and the control u of a stabilizable subsystem ξ = a(ξ, u). As an illustration, a control law is derived that achieves global stabilization of the frictionless ball-and-beam model.

Predictive control using an FPGA with application to aircraft control

Alternative and more efficient computational methods can extend the applicability of model predictive control (MPC) to systems with tight real-time requirements. This paper presents a system-on-a-chip MPC system, implemented on a field-programmable gate array (FPGA), consisting of a sparse structure-exploiting primal dual interior point (PDIP) quadratic program (QP) solver for MPC reference tracking and a fast gradient QP solver for steady-state target calculation. A parallel reduced precision iterative solver is used to accelerate the solution of the set of linear equations forming the computational bottleneck of the PDIP algorithm. A numerical study of the effect of reducing the number of iterations highlights the effectiveness of the approach. The system is demonstrated with an FPGA-in-the-loop testbench controlling a nonlinear simulation of a large airliner. This paper considers many more manipulated inputs than any previous FPGA-based MPC implementation to date, yet the implementation comfortably fits into a midrange FPGA, and the controller compares well in terms of solution quality and latency to state-of-the-art QP solvers running on a standard PC. © 1993-2012 IEEE.