A field effect transistor using highly nitrogen-doped CVD diamond for power device applications

A new idea of power device, which contains highly nitrogen-doped CVD diamond and Schottky contact, is proposed to actualise a power device with diamond. Two-dimensional simulation is conducted using ISE TCAD device simulator. While comparably high current is obtained in a transient simulation as expected, this current does not contribute to the drain-source current because of the symmetry of the device. Using an asymmetric structure or bias conditions, the device has high potential as an electric device for extremely high power, high frequency and high temperature. © 2003 Elsevier Science B.V. All rights reserved.

Defined etching of carbon-diamond films on silicon using an oxygen plasma with titanium masking

A technique for pattern transfer onto carbon-diamond films deposited by radio-frequency plasma-enhanced chemical vapour deposition is reported. Such a technique involves standard photolithography processes and reactive ion etching by oxygen and is compatible with present day microelectronic technology. The patterns transferred are well defined with very good resolution. © 1992.

Growth of carbon nanotubes on fully processed silicon-on-insulator CMOS substrates.

This paper describes the growth of Carbon Nanotubes (CNTs) both aligned and non-aligned on fully processed CMOS substrates containing high temperature tungsten metallization. While the growth method has been demonstrated in fabricating CNT gas sensitive layers for high temperatures SOI CMOS sensors, it can be employed in a variety of applications which require the use of CNTs or other nanomaterials with CMOS electronics. In our experiments we have grown CNTs both on SOI CMOS substrates and SOI CMOS microhotplates (suspended on membranes formed by post-CMOS deep RIE etching). The fully processed SOI substrates contain CMOS devices and circuits and additionally, some wafers contained high current LDMOSFETs and bipolar structures such as Lateral Insulated Gate Bipolar Transistors. All these devices were used as test structures to investigate the effect of additional post-CMOS processing such as CNT growth, membrane formation, high temperature annealing, etc. Electrical characterisation of the devices with CNTs were performed along with SEM and Raman spectroscopy. The CNTs were grown both at low and high temperatures, the former being compatible with Aluminium metallization while the latter being possible through the use of the high temperature CMOS metallization (Tungsten). In both cases we have found that there is no change in the electrical behaviour of the CMOS devices, circuits or the high current devices. A slight degradation of the thermal performance of the CMOS microhotplates was observed due to the extra heat dissipation path created by the CNT layers, but this is expected as CNTs exhibit a high thermal conductance. In addition we also observed that in the case of high temperature CNT growth a slight degradation in the manufacturing yield was observed. This is especially the case where large area membranes with a diameter in excess of 500 microns are used.