Modeling current-voltage behaviour in oxide TFTs combining trap-limited conduction with percolation

Current-voltage behaviour of oxide TFTs is modeled based on trap-limited conduction and percolation theories. The mobility has a power-law dependence, in which percolation controls the exponent while trap states determine constant term in the power law. The proposed model, which is fully physically-based, provides a good agreement with measured transistor characteristics as well as transient operations of fabricated pixel test circuits for oxide-based OLED displays. © 2013 Society for Information Display.

Building global products and competing in innovation: The role of chinese university spin-outs and required innovation capabilities

Usually, firms that produce innovative global products are discussed within the context of developed countries. New ventures in developing countries are typically viewed as low-cost product providers that generate technologically similar products to those produced by developed economies. However, this paper argues that some Chinese university spin-outs (USOs), although rare, have adopted a novel 'catch-up' strategy to build global products on the basis of indigenous platform technologies. This paper attempts to develop a conceptual framework to address the question: how do these specific Chinese USOs develop their innovation capabilities to build global products? In order to explore the idiosyncrasies of the specific USOs, this paper uses the multiple case studies method. The primary data sources are accessed through semi-structured interviews. In addition, archival data and other materials are used as secondary sources. The study analyses the configuration of capabilities that are needed for idiosyncratic growth, and maps them to the globalisation processes. This paper provides a strategic 'roadmap' as an explanatory guide to entrepreneurs, policy makers and investors to better understand the phenomena. © 2014 Inderscience Enterprises Ltd.

Fourier spectrum based extraction of an equivalent trap state density in indium gallium zinc oxide transistors

Segregating the dynamics of gate bias induced threshold voltage shift, and in particular, charge trapping in thin film transistors (TFTs) based on time constants provides insight into the different mechanisms underlying TFTs instability. In this Letter we develop a representation of the time constants and model the magnitude of charge trapped in the form of an equivalent density of created trap states. This representation is extracted from the Fourier spectrum of the dynamics of charge trapping. Using amorphous In-Ga-Zn-O TFTs as an example, the charge trapping was modeled within an energy range of ΔEt 0.3 eV and with a density of state distribution as Dt(Et-j)=Dt0exp(-ΔEt/ kT)with Dt0 = 5.02 × 1011 cm-2 eV-1. Such a model is useful for developing simulation tools for circuit design. © 2014 AIP Publishing LLC.