Metastability mechanisms in thin film transistors quantitatively resolved using post-stress relaxation of threshold voltage

A new approach is presented to resolve bias-induced metastability mechanisms in hydrogenated amorphous silicon (a-Si:H) thin film transistors (TFTs). The post stress relaxation of threshold voltage (V(T)) was employed to quantitatively distinguish between the charge trapping process in gate dielectric and defect state creation in active layer of transistor. The kinetics of the charge de-trapping from the SiN traps is analytically modeled and a Gaussian distribution of gap states is extracted for the SiN. Indeed, the relaxation in V(T) is in good agreement with the theory underlying the kinetics of charge de-trapping from gate dielectric. For the TFTs used in this work, the charge trapping in the SiN gate dielectric is shown to be the dominant metastability mechanism even at bias stress levels as low as 10 V.

Temperature dependent electron transport in amorphous oxide semiconductor thin film transistors

A temperature-dependent mobility model in amorphous oxide semiconductor (AOS) thin film transistors (TFTs) extracted from measurements of source-drain terminal currents at different gate voltages and temperatures is presented. At low gate voltages, trap-limited conduction prevails for a broad range of temperatures, whereas variable range hopping becomes dominant at lower temperatures. At high gate voltages and for all temperatures, percolation conduction comes into the picture. In all cases, the temperature-dependent mobility model obeys a universal power law as a function of gate voltage. © 2011 IEEE.

Analysis of amorphous indium-gallium-zinc-oxide thin-film transistor contact metal using Pilling-Bedworth theory and a variable capacitance diode model

It is widely reported that threshold voltage and on-state current of amorphous indium-gallium-zinc-oxide bottom-gate thin-film transistors are strongly influenced by the choice of source/drain contact metal. Electrical characterisation of thin-film transistors indicates that the electrical properties depend on the type and thickness of the metal(s) used. Electron transport mechanisms and possibilities for control of the defect state density are discussed. Pilling-Bedworth theory for metal oxidation explains the interaction between contact metal and amorphous indium-gallium-zinc-oxide, which leads to significant trap formation. Charge trapping within these states leads to variable capacitance diode-like behavior and is shown to explain the thin-film transistor operation. © 2013 AIP Publishing LLC.

Durability and photo-electric characteristics of a mille-feuille structured amorphous selenium (a-Se)-arsenic selenide (As2Se3) multi-layered thin film

A mille-feuille structured amorphous selenium (a-Se)-arsenic selenide (As2Se3) multi-layered thin film and a mixed amorphous Se-As2Se3 film is compared from a durability perspective and photo-electric perspective. The former is durable to incident laser induced degradation after numerous laser scans and does not crystallise till 105 of annealing, both of which are improved properties from the mixed evaporated film. In terms of photo-electric properties, the ratio between the photocurrent and the dark current improved whereas the increase of the dark current was higher than that of As2Se3 due to the unique current path developed within the mille-feuille structure. Implementing this structure into various amorphous semiconductors may open up a new possibility towards structure-sensitive amorphous photoconductors. © 2013 Elsevier B.V.

Silicon optical phase shifter based on strain induced by a piezoelectric PZT thin film

We demonstrate a silicon optical phase shifter based on photoelastic effect controlled by a piezoelectric thin film. The hysteresis behavior of the piezoelectric response shows potential application as bistable device independent of the optical intensity. © 2012 OSA.

Silicon optical phase shifter based on strain induced by a piezoelectric PZT thin film

We demonstrate a silicon optical phase shifter based on photoelastic effect controlled by a piezoelectric thin film. The hysteresis behavior of the piezoelectric response shows potential application as bistable device independent of the optical intensity. © OSA 2012.

Bistability in silicon microring resonator based on strain induced by a piezoelectric lead zirconate titanate thin film

We demonstrate bistability in a submicron silicon optical phase shifter based on the photoelastic effect. The strain magnitude is electrically controlled by a piezoelectric thin film placed on top of the device. The hysteresis behavior of the piezoelectric response shows potential application as bistable device independent of the optical intensity. © 2012 American Institute of Physics.

A thermalization energy analysis of the threshold voltage shift in amorphous indium gallium zinc oxide thin film transistors under simultaneous negative gate bias and illumination

It has been previously observed that thin film transistors (TFTs) utilizing an amorphous indium gallium zinc oxide (a-IGZO) semiconducting channel suffer from a threshold voltage shift when subjected to a negative gate bias and light illumination simultaneously. In this work, a thermalization energy analysis has been applied to previously published data on negative bias under illumination stress (NBIS) in a-IGZO TFTs. A barrier to defect conversion of 0.65-0.75 eV is extracted, which is consistent with reported energies of oxygen vacancy migration. The attempt-to-escape frequency is extracted to be 10 6-107 s-1, which suggests a weak localization of carriers in band tail states over a 20-40 nm distance. Models for the NBIS mechanism based on charge trapping are reviewed and a defect pool model is proposed in which two distinct distributions of defect states exist in the a-IGZO band gap: these are associated with states that are formed as neutrally charged and 2+ charged oxygen vacancies at the time of film formation. In this model, threshold voltage shift is not due to a defect creation process, but to a change in the energy distribution of states in the band gap upon defect migration as this allows a state formed as a neutrally charged vacancy to be converted into one formed as a 2+ charged vacancy and vice versa. Carrier localization close to the defect migration site is necessary for the conversion process to take place, and such defect migration sites are associated with conduction and valence band tail states. Under negative gate bias stressing, the conduction band tail is depleted of carriers, but the bias is insufficient to accumulate holes in the valence band tail states, and so no threshold voltage shift results. It is only under illumination that the quasi Fermi level for holes is sufficiently lowered to allow occupation of valence band tail states. The resulting charge localization then allows a negative threshold voltage shift, but only under conditions of simultaneous negative gate bias and illumination, as observed experimentally as the NBIS effect. © 2014 AIP Publishing LLC.

Ink-jet printing of carbon nanotube thin film transistors

Ink-jet printing is an important process for placing active electronics on plastic substrates. We demonstrate ink-jet printing as a viable method for large area fabrication of carbon nanotube (CNT) thin film transistors (TFTs). We investigate different routes for producing stable CNT solutions ("inks"). These consist of dispersion methods for CNT debundling and the use of different solvents, such as N -methyl-2-pyrrolidone. The resulting printable inks are dispensed by ink-jet onto electrode bearing silicon substrates. The source to drain electrode gap is bridged by percolating networks of CNTs. Despite the presence of metallic CNTs, our devices exhibit field effect behavior, with effective mobility of ∼0.07 cm2 /V s and ON/OFF current ratio of up to 100. This result demonstrates the feasibility of ink-jet printing of nanostructured materials for TFT manufacture. © 2007 American Institute of Physics.

A comparative study of plasma-enhanced chemical vapor gate dielectrics for solution-processed polymer thin-film transistor circuit integration

This paper considers plasma-enhanced chemical vapor deposited (PECVD) silicon nitride (SiNx) and silicon oxide (SiOx) as gate dielectrics for organic thin-film transistors (OTFTs), with solution-processed poly[5, 5′ -bis(3-dodecyl-2-thienyl)-2, 2′ -bithiophene] (PQT-12) as the active semiconductor layer. We examine transistors with SiNx films of varying composition deposited at 300 °C as well as 150 °C for plastic compatibility. The transistors show over 100% (two times) improvement in field-effect mobility as the silicon content in SiNx increases, with mobility (μFE) up to 0.14 cm2 /V s and on/off current ratio (ION / IOFF) of 108. With PECVD SiOx gate dielectric, preliminary devices exhibit a μFE of 0.4 cm2 /V s and ION / IOFF of 108. PQT-12 OTFTs with PECVD SiNx and SiOx gate dielectrics on flexible plastic substrates are also presented. These results demonstrate the viability of using PECVD SiN x and SiOx as gate dielectrics for OTFT circuit integration, where the low temperature and large area deposition capabilities of PECVD films are highly amenable to integration of OTFT circuits targeted for flexible and lightweight applications. © 2008 American Institute of Physics.