Hydrogenated amorphous silicon and silicon nitride deposited at less than 100° C by ECR-PECVD for thin film transistors

A systematic study has been made of the growth of both hydrogenated amorphous silicon (a-Si:H) and silicon nitride (a-SiN) by electron cyclotron resonance plasma enhanced chemical vapour deposition (ECR-PECVD). In the case of a-SiN, helium and nitrogen gas is injected into the system such that it passes through the resonance zone. These highly ionised gases provide sufficient energy to ionise the silane gas, which is injected further downstream. It is demonstrated that a gas phase reaction occurs between the silane and nitrogen species. It is control of the ratio of silane to nitrogen in the plasma which is critical for the production of stoichiometric a-SiN. Material has been produced at 80°C with a Si:N ratio of 1:1.3 a breakdown strength of ∼6 MV cm-1 and resistivity of > 1014 Ω cm. In the case of a-Si:H, helium and hydrogen gas is injected into the ECR zone and silane is injected downstream. It is shown that control of the gas phase reactions is critical in this process also. a-Si:H has been deposited at 80 °C with a dark conductivity of 10-11 Ω-1 cm-1 and a photosensitivity of justbelowl 4×104. Such materials are suitable for use in thin film transistors on plastic substrates.

Characterization of defect removal in hydrogenated and deuterated amorphous silicon thin film transistors

Thin film transistors (TFTs) utilizing an hydrogenated amorphous silicon (a-Si:H) channel layer exhibit a shift in the threshold voltage with time under the application of a gate bias voltage due to the creation of metastable defects. These defects are removed by annealing the device with zero gate bias applied. The defect removal process can be characterized by a thermalization energy which is, in turn, dependent upon an attempt-to-escape frequency for defect removal. The threshold voltage of both hydrogenated and deuterated amorphous silicon (a-Si:D) TFTs has been measured as a function of annealing time and temperature. Using a molecular dynamics simulation of hydrogen and deuterium in a silicon network in the H2 * configuration, it is shown that the experimental results are consistent with an attempt-to-escape frequency of (4.4 ± 0.3) × 1013 Hz and (5.7 ± 0.3) × 1013 Hz for a-Si:H and a-Si:D respectively which is attributed to the oscillation of the Si-H and Si-D bonds. Using this approach, it becomes possible to describe defect removal in hydrogenated and deuterated material by the thermalization energies of (1.552 ± 0.003) eV and (1.559 ± 0.003) eV respectively. This correlates with the energy per atom of the Si-H and Si-D bonds. © 2006 Elsevier B.V. All rights reserved.

How to achieve high mobility thin film transistors by direct deposition of silicon using 13.56 MHz RF PECVD?

CMOS nanocrystalline silicon thin film transistors with high field effect mobility are reported. The transistors were directly deposited by radio-frequency plasma enhanced chemical vapor deposition at 150°C The transistors show maximum field effect mobility of 450 cm2/V-s for electrons and 100 cm2/V-s for holes at room temperature. We attribute the high mobilities to a reduction of the oxygen content, which acts as an accidental donor. Indeed, secondary ion mass spectrometry measurements show that the impurity concentration in the nanocrystalline Si layer is comparable to, or lower than, the defect density in the material, which is already low thanks to hydrogen passivation.

Erratum: "Zinc oxide nanostructures and high electron mobility nanocomposite thin film transistors" (IEEE Transactions on Electron Devices (2009))

In the above entitled paper (ibid., vol. 55, no. 11, pp. 3001-3011), two errors were noticed after the paper went to press. The errors are corrected here.

High mobility N-channel and P-channel nanocrystalline silicon thin-film transistors

We report high hole and electron mobilities in nanocrystalline silicon (nc-Si:H) top-gate staggered thin-film transistors (TFTs) fabricated by direct plasma-enhanced chemical vapor deposition (PECVD) at 260°C. The n-channel nc-Si:H TFT with n+ nc-Si:H ohmic contacts shows a field-effect electron mobility (μnFE) of 130 cm2/Vs, which increases to 150 cm2/Vs with Cr-silicide contacts, along with a field-effect hole mobility (μhFE) of 25 cm2/Vs. To the best of our knowledge, the hole and electron mobilities reported here are the highest achieved to date using direct PECVD. © 2005 IEEE.

Effect of gate dielectric scaling in nanometer scale vertical thin film transistors

A short channel vertical thin film transistor (VTFT) with 30 nm SiN x gate dielectric is reported for low voltage, high-resolution active matrix applications. The device demonstrates an ON/OFF current ratio as high as 10 9, leakage current in the fA range, and a sub-threshold slope steeper than 0.23 V/dec exhibiting a marked improvement with scaling of the gate dielectric thickness. © 2011 American Institute of Physics.

Soft-lithographic processed soluble micropatterns of reduced graphene oxide for wafer-scale thin film transistors and gas sensors

PDMS based imprinting is firstly developed for patterning of rGO on a large area. High quality stripe and square shaped rGO patterns are obtained and the electrical properties of the rGO film can be adjusted by the concentration of GO suspension. The arrays of rGO electronics are fabricated from the patterned film by a simple shadow mask method. Gas sensors, which are based on these rGO electronics, show high sensitivity and recyclable usage in sensing NH 3. © 2012 The Royal Society of Chemistry.

Metastability mechanisms in thin film transistors quantitatively resolved using post-stress relaxation of threshold voltage

A new approach is presented to resolve bias-induced metastability mechanisms in hydrogenated amorphous silicon (a-Si:H) thin film transistors (TFTs). The post stress relaxation of threshold voltage (V(T)) was employed to quantitatively distinguish between the charge trapping process in gate dielectric and defect state creation in active layer of transistor. The kinetics of the charge de-trapping from the SiN traps is analytically modeled and a Gaussian distribution of gap states is extracted for the SiN. Indeed, the relaxation in V(T) is in good agreement with the theory underlying the kinetics of charge de-trapping from gate dielectric. For the TFTs used in this work, the charge trapping in the SiN gate dielectric is shown to be the dominant metastability mechanism even at bias stress levels as low as 10 V.

Light-bias induced instability and persistent photoconductivity in In-Zn-O/Ga-In-Zn-O thin film transistors

Stress/recovery measurements demonstrate that even high-performance passivated In-Zn-O/ Ga-In-Zn-O thin film transistors with excellent in-dark stability suffer from light-bias induced threshold voltage shift (ΔV T) and defect density changes. Visible light stress leads to ionisation of oxygen vacancy sites, causing persistent photoconductivity. This makes the material act as though it was n-doped, always causing a negative threshold voltage shift under strong illumination, regardless of the magnitude and polarity of the gate bias.

Temperature dependent electron transport in amorphous oxide semiconductor thin film transistors

A temperature-dependent mobility model in amorphous oxide semiconductor (AOS) thin film transistors (TFTs) extracted from measurements of source-drain terminal currents at different gate voltages and temperatures is presented. At low gate voltages, trap-limited conduction prevails for a broad range of temperatures, whereas variable range hopping becomes dominant at lower temperatures. At high gate voltages and for all temperatures, percolation conduction comes into the picture. In all cases, the temperature-dependent mobility model obeys a universal power law as a function of gate voltage. © 2011 IEEE.

P-16: Light-bias induced instability and persistent photoconductivity in in-zn-o/ga-in-zn-o thin film transistors

Stress/recovery measurements demonstrate that even highperformance passivated In-Zn-O/ Ga-In-Zn-O thin film transistors with excellent in-dark stability suffer from light-bias induced threshold voltage shift (ΔV T) and defect density changes. Visible light stress leads to ionisation of oxygen vacancy sites, causing persistent photoconductivity. This makes the material act as though it was n-doped, always causing a negative threshold voltage shift under strong illumination, regardless of the magnitude and polarity of the gate bias. © 2011 SID.